[v2,06/11] drm: Add the PSR SU granularity registers offsets

Submitted by José Roberto de Souza on Nov. 30, 2018, 2:25 a.m.

Details

Message ID 20181130022525.25676-6-jose.souza@intel.com
State New
Headers show
Series "Series without cover letter" ( rev: 1 ) in DRI devel

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Commit Message

José Roberto de Souza Nov. 30, 2018, 2:25 a.m.
Source is required to comply to sink SU granularity when
DP_PSR2_SU_GRANULARITY_REQUIRED is set in DP_PSR_CAPS,
so adding the registers offsets.

v2: Also adding DP_PSR2_SU_Y_GRANULARITY(Rodrigo)

Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 include/drm/drm_dp_helper.h | 4 ++++
 1 file changed, 4 insertions(+)

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diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 047314ce25d6..0e04b2db3dde 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -314,6 +314,10 @@ 
 # define DP_PSR_SETUP_TIME_SHIFT            1
 # define DP_PSR2_SU_Y_COORDINATE_REQUIRED   (1 << 4)  /* eDP 1.4a */
 # define DP_PSR2_SU_GRANULARITY_REQUIRED    (1 << 5)  /* eDP 1.4b */
+
+#define DP_PSR2_SU_X_GRANULARITY	    0x072 /* eDP 1.4b */
+#define DP_PSR2_SU_Y_GRANULARITY	    0x074 /* eDP 1.4b */
+
 /*
  * 0x80-0x8f describe downstream port capabilities, but there are two layouts
  * based on whether DP_DETAILED_CAP_INFO_AVAILABLE was set.  If it was not,

Comments

On Thu, 2018-11-29 at 18:25 -0800, José Roberto de Souza wrote:
> Source is required to comply to sink SU granularity when
> DP_PSR2_SU_GRANULARITY_REQUIRED is set in DP_PSR_CAPS,
> so adding the registers offsets.
> 
> v2: Also adding DP_PSR2_SU_Y_GRANULARITY(Rodrigo)
> 
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  include/drm/drm_dp_helper.h | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/include/drm/drm_dp_helper.h
> b/include/drm/drm_dp_helper.h
> index 047314ce25d6..0e04b2db3dde 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -314,6 +314,10 @@
>  # define DP_PSR_SETUP_TIME_SHIFT            1
>  # define DP_PSR2_SU_Y_COORDINATE_REQUIRED   (1 << 4)  /* eDP 1.4a */
>  # define DP_PSR2_SU_GRANULARITY_REQUIRED    (1 << 5)  /* eDP 1.4b */
> +
> +#define DP_PSR2_SU_X_GRANULARITY	    0x072 /* eDP 1.4b */
> +#define DP_PSR2_SU_Y_GRANULARITY	    0x074 /* eDP 1.4b */
Definitions above use spaces instead of tabs, so it'd have been good to
be consistent. But, there are places in the file where tabs are used
too, so will leave it to you if you want to switch.

> +
Verified against eDP spec 1.4b
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>

>  /*
>   * 0x80-0x8f describe downstream port capabilities, but there are
> two layouts
>   * based on whether DP_DETAILED_CAP_INFO_AVAILABLE was set.  If it
> was not,