[5/5] drm/i915/icl: Fix port B combo PHY context loss after DC transitions

Submitted by Imre Deak on Nov. 2, 2018, 6:07 p.m.

Details

Message ID 20181102180706.16582-6-imre.deak@intel.com
State New
Headers show
Series "drm/i915/icl: Fix combo PHY HW context loss" ( rev: 1 ) in Intel GFX

Not browsing as part of any series.

Commit Message

Imre Deak Nov. 2, 2018, 6:07 p.m.
On ICL DMC/PCODE retains the HW context only for port A across DC
transitions, for the other port B combo PHY, it doesn't. So we need to
do this manually after exiting from DC6. Do the reinit even after
exiting from DC5, it won't hurt since we only reinit the PHY in case
it's needed (in case it was disabled to begin with).

As can be guessed from the bugzilla report leaving the PHY uninited will
lead to a later timeout during the port B specific AUX and DDI_IO power
well enabling.

Bspec: 21257
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108070
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/intel_runtime_pm.c | 8 ++++++++
 1 file changed, 8 insertions(+)

Patch hide | download patch | download mbox

diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index f8da471e81aa..763912c0245c 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -843,6 +843,14 @@  static void gen9_dc_off_power_well_enable(struct drm_i915_private *dev_priv,
 
 	if (IS_GEN9_LP(dev_priv))
 		bxt_verify_ddi_phy_power_wells(dev_priv);
+
+	if (IS_ICELAKE(dev_priv))
+		/*
+		 * DMC retains HW context only for port A, the other combo
+		 * PHY's HW context for port B is lost after DC transitions,
+		 * so we need to restore it manually.
+		 */
+		icl_combo_phys_init(dev_priv);
 }
 
 static void gen9_dc_off_power_well_disable(struct drm_i915_private *dev_priv,

Comments

On Fri, Nov 02, 2018 at 08:07:06PM +0200, Imre Deak wrote:
> On ICL DMC/PCODE retains the HW context only for port A across DC
> transitions, for the other port B combo PHY, it doesn't. So we need to
> do this manually after exiting from DC6. Do the reinit even after
> exiting from DC5, it won't hurt since we only reinit the PHY in case
> it's needed (in case it was disabled to begin with).
> 
> As can be guessed from the bugzilla report leaving the PHY uninited will
> lead to a later timeout during the port B specific AUX and DDI_IO power
> well enabling.
> 
> Bspec: 21257
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108070
> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_runtime_pm.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index f8da471e81aa..763912c0245c 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -843,6 +843,14 @@ static void gen9_dc_off_power_well_enable(struct drm_i915_private *dev_priv,
>  
>  	if (IS_GEN9_LP(dev_priv))
>  		bxt_verify_ddi_phy_power_wells(dev_priv);
> +
> +	if (IS_ICELAKE(dev_priv))

maybe INTEL_GEN(dev_priv) >= 11?


with or without:

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>



> +		/*
> +		 * DMC retains HW context only for port A, the other combo
> +		 * PHY's HW context for port B is lost after DC transitions,
> +		 * so we need to restore it manually.
> +		 */
> +		icl_combo_phys_init(dev_priv);
>  }
>  
>  static void gen9_dc_off_power_well_disable(struct drm_i915_private *dev_priv,
> -- 
> 2.13.2
>
On Fri, 2018-11-02 at 20:07 +0200, Imre Deak wrote:
> On ICL DMC/PCODE retains the HW context only for port A across DC

> transitions, for the other port B combo PHY, it doesn't. So we need

> to

> do this manually after exiting from DC6. Do the reinit even after

> exiting from DC5, it won't hurt since we only reinit the PHY in case

> it's needed (in case it was disabled to begin with).

> 

> As can be guessed from the bugzilla report leaving the PHY uninited

> will

> lead to a later timeout during the port B specific AUX and DDI_IO

> power

> well enabling.

> 

> Bspec: 21257

> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108070

> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>

> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>

> Cc: José Roberto de Souza <jose.souza@intel.com>

> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>

> Signed-off-by: Imre Deak <imre.deak@intel.com>

> ---

>  drivers/gpu/drm/i915/intel_runtime_pm.c | 8 ++++++++

>  1 file changed, 8 insertions(+)

> 

> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c

> b/drivers/gpu/drm/i915/intel_runtime_pm.c

> index f8da471e81aa..763912c0245c 100644

> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c

> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c

> @@ -843,6 +843,14 @@ static void gen9_dc_off_power_well_enable(struct

> drm_i915_private *dev_priv,

>  

>  	if (IS_GEN9_LP(dev_priv))

>  		bxt_verify_ddi_phy_power_wells(dev_priv);

> +


Minor:

else if (INTEL_GEN(dev_priv) >= 11)

Maybe?

Other than that:
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>



> +	if (IS_ICELAKE(dev_priv))

> +		/*

> +		 * DMC retains HW context only for port A, the other

> combo

> +		 * PHY's HW context for port B is lost after DC

> transitions,

> +		 * so we need to restore it manually.

> +		 */

> +		icl_combo_phys_init(dev_priv);

>  }

>  

>  static void gen9_dc_off_power_well_disable(struct drm_i915_private

> *dev_priv,
On Fri, Nov 02, 2018 at 12:22:15PM -0700, Rodrigo Vivi wrote:
> On Fri, Nov 02, 2018 at 08:07:06PM +0200, Imre Deak wrote:
> > On ICL DMC/PCODE retains the HW context only for port A across DC
> > transitions, for the other port B combo PHY, it doesn't. So we need to
> > do this manually after exiting from DC6. Do the reinit even after
> > exiting from DC5, it won't hurt since we only reinit the PHY in case
> > it's needed (in case it was disabled to begin with).
> > 
> > As can be guessed from the bugzilla report leaving the PHY uninited will
> > lead to a later timeout during the port B specific AUX and DDI_IO power
> > well enabling.
> > 
> > Bspec: 21257
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108070
> > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Cc: José Roberto de Souza <jose.souza@intel.com>
> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_runtime_pm.c | 8 ++++++++
> >  1 file changed, 8 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > index f8da471e81aa..763912c0245c 100644
> > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > @@ -843,6 +843,14 @@ static void gen9_dc_off_power_well_enable(struct drm_i915_private *dev_priv,
> >  
> >  	if (IS_GEN9_LP(dev_priv))
> >  		bxt_verify_ddi_phy_power_wells(dev_priv);
> > +
> > +	if (IS_ICELAKE(dev_priv))
> 
> maybe INTEL_GEN(dev_priv) >= 11?

Ok, will change it.

> 
> 
> with or without:
> 
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> 
> 
> 
> > +		/*
> > +		 * DMC retains HW context only for port A, the other combo
> > +		 * PHY's HW context for port B is lost after DC transitions,
> > +		 * so we need to restore it manually.
> > +		 */
> > +		icl_combo_phys_init(dev_priv);
> >  }
> >  
> >  static void gen9_dc_off_power_well_disable(struct drm_i915_private *dev_priv,
> > -- 
> > 2.13.2
> >