[02/25] drm/i915: Mark pin flags as u64

Submitted by Chris Wilson on Nov. 2, 2018, 4:12 p.m.

Details

Message ID 20181102161232.17742-2-chris@chris-wilson.co.uk
State Accepted
Series "Series without cover letter"
Commit 0014868b9c3c1dda1de6711cf58c3486fb422d07
Headers show

Commit Message

Chris Wilson Nov. 2, 2018, 4:12 p.m.
Since the flags are being used to operate on a u64 variable, they too
need to be marked as such so that the inverses are full width (and not
zero extended on 32b kernels and bdw+).

Reported-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@vger.kernel.org
---
 drivers/gpu/drm/i915/i915_gem_gtt.h | 28 ++++++++++++++--------------
 1 file changed, 14 insertions(+), 14 deletions(-)

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diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index a030299b79cd..4874da09a3c4 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -660,20 +660,20 @@  int i915_gem_gtt_insert(struct i915_address_space *vm,
 			u64 start, u64 end, unsigned int flags);
 
 /* Flags used by pin/bind&friends. */
-#define PIN_NONBLOCK		BIT(0)
-#define PIN_MAPPABLE		BIT(1)
-#define PIN_ZONE_4G		BIT(2)
-#define PIN_NONFAULT		BIT(3)
-#define PIN_NOEVICT		BIT(4)
-
-#define PIN_MBZ			BIT(5) /* I915_VMA_PIN_OVERFLOW */
-#define PIN_GLOBAL		BIT(6) /* I915_VMA_GLOBAL_BIND */
-#define PIN_USER		BIT(7) /* I915_VMA_LOCAL_BIND */
-#define PIN_UPDATE		BIT(8)
-
-#define PIN_HIGH		BIT(9)
-#define PIN_OFFSET_BIAS		BIT(10)
-#define PIN_OFFSET_FIXED	BIT(11)
+#define PIN_NONBLOCK		BIT_ULL(0)
+#define PIN_MAPPABLE		BIT_ULL(1)
+#define PIN_ZONE_4G		BIT_ULL(2)
+#define PIN_NONFAULT		BIT_ULL(3)
+#define PIN_NOEVICT		BIT_ULL(4)
+
+#define PIN_MBZ			BIT_ULL(5) /* I915_VMA_PIN_OVERFLOW */
+#define PIN_GLOBAL		BIT_ULL(6) /* I915_VMA_GLOBAL_BIND */
+#define PIN_USER		BIT_ULL(7) /* I915_VMA_LOCAL_BIND */
+#define PIN_UPDATE		BIT_ULL(8)
+
+#define PIN_HIGH		BIT_ULL(9)
+#define PIN_OFFSET_BIAS		BIT_ULL(10)
+#define PIN_OFFSET_FIXED	BIT_ULL(11)
 #define PIN_OFFSET_MASK		(-I915_GTT_PAGE_SIZE)
 
 #endif

Comments

Lionel Landwerlin Nov. 2, 2018, 4:48 p.m.
On 02/11/2018 16:12, Chris Wilson wrote:
> Since the flags are being used to operate on a u64 variable, they too
> need to be marked as such so that the inverses are full width (and not
> zero extended on 32b kernels and bdw+).
>
> Reported-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: stable@vger.kernel.org


Feels like Sergii should have done a v2.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>


> ---
>   drivers/gpu/drm/i915/i915_gem_gtt.h | 28 ++++++++++++++--------------
>   1 file changed, 14 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
> index a030299b79cd..4874da09a3c4 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.h
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
> @@ -660,20 +660,20 @@ int i915_gem_gtt_insert(struct i915_address_space *vm,
>   			u64 start, u64 end, unsigned int flags);
>   
>   /* Flags used by pin/bind&friends. */
> -#define PIN_NONBLOCK		BIT(0)
> -#define PIN_MAPPABLE		BIT(1)
> -#define PIN_ZONE_4G		BIT(2)
> -#define PIN_NONFAULT		BIT(3)
> -#define PIN_NOEVICT		BIT(4)
> -
> -#define PIN_MBZ			BIT(5) /* I915_VMA_PIN_OVERFLOW */
> -#define PIN_GLOBAL		BIT(6) /* I915_VMA_GLOBAL_BIND */
> -#define PIN_USER		BIT(7) /* I915_VMA_LOCAL_BIND */
> -#define PIN_UPDATE		BIT(8)
> -
> -#define PIN_HIGH		BIT(9)
> -#define PIN_OFFSET_BIAS		BIT(10)
> -#define PIN_OFFSET_FIXED	BIT(11)
> +#define PIN_NONBLOCK		BIT_ULL(0)
> +#define PIN_MAPPABLE		BIT_ULL(1)
> +#define PIN_ZONE_4G		BIT_ULL(2)
> +#define PIN_NONFAULT		BIT_ULL(3)
> +#define PIN_NOEVICT		BIT_ULL(4)
> +
> +#define PIN_MBZ			BIT_ULL(5) /* I915_VMA_PIN_OVERFLOW */
> +#define PIN_GLOBAL		BIT_ULL(6) /* I915_VMA_GLOBAL_BIND */
> +#define PIN_USER		BIT_ULL(7) /* I915_VMA_LOCAL_BIND */
> +#define PIN_UPDATE		BIT_ULL(8)
> +
> +#define PIN_HIGH		BIT_ULL(9)
> +#define PIN_OFFSET_BIAS		BIT_ULL(10)
> +#define PIN_OFFSET_FIXED	BIT_ULL(11)
>   #define PIN_OFFSET_MASK		(-I915_GTT_PAGE_SIZE)
>   
>   #endif
Michal Wajdeczko Nov. 2, 2018, 5:22 p.m.
On Fri, 02 Nov 2018 17:12:09 +0100, Chris Wilson  
<chris@chris-wilson.co.uk> wrote:

> Since the flags are being used to operate on a u64 variable, they too
> need to be marked as such so that the inverses are full width (and not
> zero extended on 32b kernels and bdw+).
>
> Reported-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: stable@vger.kernel.org
> ---

Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>

Michal

>  drivers/gpu/drm/i915/i915_gem_gtt.h | 28 ++++++++++++++--------------
>  1 file changed, 14 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h  
> b/drivers/gpu/drm/i915/i915_gem_gtt.h
> index a030299b79cd..4874da09a3c4 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.h
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
> @@ -660,20 +660,20 @@ int i915_gem_gtt_insert(struct i915_address_space  
> *vm,
>  			u64 start, u64 end, unsigned int flags);
> /* Flags used by pin/bind&friends. */
> -#define PIN_NONBLOCK		BIT(0)
> -#define PIN_MAPPABLE		BIT(1)
> -#define PIN_ZONE_4G		BIT(2)
> -#define PIN_NONFAULT		BIT(3)
> -#define PIN_NOEVICT		BIT(4)
> -
> -#define PIN_MBZ			BIT(5) /* I915_VMA_PIN_OVERFLOW */
> -#define PIN_GLOBAL		BIT(6) /* I915_VMA_GLOBAL_BIND */
> -#define PIN_USER		BIT(7) /* I915_VMA_LOCAL_BIND */
> -#define PIN_UPDATE		BIT(8)
> -
> -#define PIN_HIGH		BIT(9)
> -#define PIN_OFFSET_BIAS		BIT(10)
> -#define PIN_OFFSET_FIXED	BIT(11)
> +#define PIN_NONBLOCK		BIT_ULL(0)
> +#define PIN_MAPPABLE		BIT_ULL(1)
> +#define PIN_ZONE_4G		BIT_ULL(2)
> +#define PIN_NONFAULT		BIT_ULL(3)
> +#define PIN_NOEVICT		BIT_ULL(4)
> +
> +#define PIN_MBZ			BIT_ULL(5) /* I915_VMA_PIN_OVERFLOW */
> +#define PIN_GLOBAL		BIT_ULL(6) /* I915_VMA_GLOBAL_BIND */
> +#define PIN_USER		BIT_ULL(7) /* I915_VMA_LOCAL_BIND */
> +#define PIN_UPDATE		BIT_ULL(8)
> +
> +#define PIN_HIGH		BIT_ULL(9)
> +#define PIN_OFFSET_BIAS		BIT_ULL(10)
> +#define PIN_OFFSET_FIXED	BIT_ULL(11)
>  #define PIN_OFFSET_MASK		(-I915_GTT_PAGE_SIZE)
> #endif