[v8,37/38] drm/i915/icl: Consider DSI for getting transcoder state

Submitted by Jani Nikula on Oct. 30, 2018, 11:56 a.m.

Details

Message ID 306b7ed2758a81833fb3e1ebde146dc1a2e7e93b.1540900289.git.jani.nikula@intel.com
State New
Headers show
Series "drm/i915/icl: dsi enabling" ( rev: 3 ) in Intel GFX

Not browsing as part of any series.

Commit Message

Jani Nikula Oct. 30, 2018, 11:56 a.m.
From: Madhav Chauhan <madhav.chauhan@intel.com>

For Gen11 DSI, we use similar registers like for eDP
to find if DSI encoder is connected or not to a pipe.
This patch refactors existing hsw_get_transcoder_state()
to handle this.

Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 29 ++++++++++++++++++++++-------
 1 file changed, 22 insertions(+), 7 deletions(-)

Patch hide | download patch | download mbox

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 1d46f06ede37..1670646240ba 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9366,6 +9366,8 @@  static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
 	struct drm_i915_private *dev_priv = to_i915(dev);
 	enum intel_display_power_domain power_domain;
 	u32 tmp;
+	bool is_dsi = false;
+	bool is_edp = false;
 
 	/*
 	 * The pipe->transcoder mapping is fixed with the exception of the eDP
@@ -9378,26 +9380,39 @@  static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
 	 * consistency and less surprising code; it's in always on power).
 	 */
 	tmp = I915_READ(TRANS_DDI_FUNC_CTL(TRANSCODER_EDP));
-	if (tmp & TRANS_DDI_FUNC_ENABLE) {
-		enum pipe trans_edp_pipe;
+	if (tmp & TRANS_DDI_FUNC_ENABLE)
+		is_edp = true;
+
+	if (IS_ICELAKE(dev_priv)) {
+		tmp = I915_READ(TRANS_DDI_FUNC_CTL(TRANSCODER_DSI_0));
+		if (tmp & TRANS_DDI_FUNC_ENABLE)
+			is_dsi = true;
+	}
+
+	if (is_edp || is_dsi) {
+		enum pipe trans_pipe;
 		switch (tmp & TRANS_DDI_EDP_INPUT_MASK) {
 		default:
 			WARN(1, "unknown pipe linked to edp transcoder\n");
 			/* fall through */
 		case TRANS_DDI_EDP_INPUT_A_ONOFF:
 		case TRANS_DDI_EDP_INPUT_A_ON:
-			trans_edp_pipe = PIPE_A;
+			trans_pipe = PIPE_A;
 			break;
 		case TRANS_DDI_EDP_INPUT_B_ONOFF:
-			trans_edp_pipe = PIPE_B;
+			trans_pipe = PIPE_B;
 			break;
 		case TRANS_DDI_EDP_INPUT_C_ONOFF:
-			trans_edp_pipe = PIPE_C;
+			trans_pipe = PIPE_C;
 			break;
 		}
 
-		if (trans_edp_pipe == crtc->pipe)
-			pipe_config->cpu_transcoder = TRANSCODER_EDP;
+		if (trans_pipe == crtc->pipe) {
+			if (is_edp)
+				pipe_config->cpu_transcoder = TRANSCODER_EDP;
+			else if (is_dsi)
+				pipe_config->cpu_transcoder = TRANSCODER_DSI_0;
+		}
 	}
 
 	power_domain = POWER_DOMAIN_TRANSCODER(pipe_config->cpu_transcoder);

Comments

On Tue, Oct 30, 2018 at 01:56:43PM +0200, Jani Nikula wrote:
> From: Madhav Chauhan <madhav.chauhan@intel.com>
> 
> For Gen11 DSI, we use similar registers like for eDP
> to find if DSI encoder is connected or not to a pipe.
> This patch refactors existing hsw_get_transcoder_state()
> to handle this.
> 
> Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 29 ++++++++++++++++++++++-------
>  1 file changed, 22 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 1d46f06ede37..1670646240ba 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -9366,6 +9366,8 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
>  	struct drm_i915_private *dev_priv = to_i915(dev);
>  	enum intel_display_power_domain power_domain;
>  	u32 tmp;
> +	bool is_dsi = false;
> +	bool is_edp = false;
>  
>  	/*
>  	 * The pipe->transcoder mapping is fixed with the exception of the eDP
> @@ -9378,26 +9380,39 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
>  	 * consistency and less surprising code; it's in always on power).
>  	 */
>  	tmp = I915_READ(TRANS_DDI_FUNC_CTL(TRANSCODER_EDP));
> -	if (tmp & TRANS_DDI_FUNC_ENABLE) {
> -		enum pipe trans_edp_pipe;
> +	if (tmp & TRANS_DDI_FUNC_ENABLE)
> +		is_edp = true;
> +
> +	if (IS_ICELAKE(dev_priv)) {
> +		tmp = I915_READ(TRANS_DDI_FUNC_CTL(TRANSCODER_DSI_0));
> +		if (tmp & TRANS_DDI_FUNC_ENABLE)
> +			is_dsi = true;
> +	}
> +

WARN_ON(is_edp && is_dsi) ?

> +	if (is_edp || is_dsi) {
> +		enum pipe trans_pipe;
>  		switch (tmp & TRANS_DDI_EDP_INPUT_MASK) {
>  		default:
>  			WARN(1, "unknown pipe linked to edp transcoder\n");
>  			/* fall through */
>  		case TRANS_DDI_EDP_INPUT_A_ONOFF:
>  		case TRANS_DDI_EDP_INPUT_A_ON:
> -			trans_edp_pipe = PIPE_A;
> +			trans_pipe = PIPE_A;
>  			break;
>  		case TRANS_DDI_EDP_INPUT_B_ONOFF:
> -			trans_edp_pipe = PIPE_B;
> +			trans_pipe = PIPE_B;
>  			break;
>  		case TRANS_DDI_EDP_INPUT_C_ONOFF:
> -			trans_edp_pipe = PIPE_C;
> +			trans_pipe = PIPE_C;
>  			break;
>  		}
>  
> -		if (trans_edp_pipe == crtc->pipe)
> -			pipe_config->cpu_transcoder = TRANSCODER_EDP;
> +		if (trans_pipe == crtc->pipe) {
> +			if (is_edp)
> +				pipe_config->cpu_transcoder = TRANSCODER_EDP;
> +			else if (is_dsi)
> +				pipe_config->cpu_transcoder = TRANSCODER_DSI_0;
> +		}
>  	}
>  
>  	power_domain = POWER_DOMAIN_TRANSCODER(pipe_config->cpu_transcoder);
> -- 
> 2.11.0