[v2,2/3] i965/gen10+: Enable object level preemption.

Submitted by Rafael Antognolli on Oct. 29, 2018, 5:19 p.m.

Details

Message ID 20181029171954.25263-3-rafael.antognolli@intel.com
State New
Headers show
Series "Add object level preemption to i965." ( rev: 1 ) in Mesa

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Commit Message

Rafael Antognolli Oct. 29, 2018, 5:19 p.m.
Set bit when initializing context.

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
---
 src/mesa/drivers/dri/i965/brw_context.h      |  2 ++
 src/mesa/drivers/dri/i965/brw_defines.h      |  5 ++++
 src/mesa/drivers/dri/i965/brw_state.h        |  3 ++-
 src/mesa/drivers/dri/i965/brw_state_upload.c | 25 ++++++++++++++++++++
 4 files changed, 34 insertions(+), 1 deletion(-)

Patch hide | download patch | download mbox

diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index 7fd15669eb9..9253386de7d 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -842,6 +842,8 @@  struct brw_context
 
    GLuint primitive; /**< Hardware primitive, such as _3DPRIM_TRILIST. */
 
+   bool object_preemption; /**< Object level preemption enabled. */
+
    GLenum reduced_primitive;
 
    /**
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index 97a787a2ab3..affc690618e 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -1681,4 +1681,9 @@  enum brw_pixel_shader_coverage_mask_mode {
 # define HEADERLESS_MESSAGE_FOR_PREEMPTABLE_CONTEXTS        (1 << 5)
 # define HEADERLESS_MESSAGE_FOR_PREEMPTABLE_CONTEXTS_MASK   REG_MASK(1 << 5)
 
+#define CS_CHICKEN1                        0x2580 /* Gen9+ */
+# define GEN9_REPLAY_MODE_MIDBUFFER             (0 << 0)
+# define GEN9_REPLAY_MODE_MIDOBJECT             (1 << 0)
+# define GEN9_REPLAY_MODE_MASK                  REG_MASK(1 << 0)
+
 #endif
diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index f6acf81b899..546d103d1a4 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -128,7 +128,7 @@  void brw_disk_cache_write_compute_program(struct brw_context *brw);
 void brw_disk_cache_write_render_programs(struct brw_context *brw);
 
 /***********************************************************************
- * brw_state.c
+ * brw_state_upload.c
  */
 void brw_upload_render_state(struct brw_context *brw);
 void brw_render_state_finished(struct brw_context *brw);
@@ -138,6 +138,7 @@  void brw_init_state(struct brw_context *brw);
 void brw_destroy_state(struct brw_context *brw);
 void brw_emit_select_pipeline(struct brw_context *brw,
                               enum brw_pipeline pipeline);
+void brw_enable_obj_preemption(struct brw_context *brw, bool enable);
 
 static inline void
 brw_select_pipeline(struct brw_context *brw, enum brw_pipeline pipeline)
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
index 7f20579fb87..2e42dfb36d6 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -45,6 +45,28 @@ 
 #include "brw_cs.h"
 #include "main/framebuffer.h"
 
+void
+brw_enable_obj_preemption(struct brw_context *brw, bool enable)
+{
+   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   assert(devinfo->gen >= 9);
+
+   if (enable == brw->object_preemption)
+      return;
+
+   /* A fixed function pipe flush is required before modifying this field */
+   brw_emit_pipe_control_flush(brw, PIPE_CONTROL_FLUSH_ENABLE);
+
+   bool replay_mode = enable ?
+      GEN9_REPLAY_MODE_MIDOBJECT : GEN9_REPLAY_MODE_MIDBUFFER;
+
+   /* enable object level preemption */
+   brw_load_register_imm32(brw, CS_CHICKEN1,
+                           replay_mode | GEN9_REPLAY_MODE_MASK);
+
+   brw->object_preemption = enable;
+}
+
 static void
 brw_upload_initial_gpu_state(struct brw_context *brw)
 {
@@ -153,6 +175,9 @@  brw_upload_initial_gpu_state(struct brw_context *brw)
          ADVANCE_BATCH();
       }
    }
+
+   if (devinfo->gen >= 10)
+      brw_enable_obj_preemption(brw, true);
 }
 
 static inline const struct brw_tracked_state *

Comments

Quoting Rafael Antognolli (2018-10-29 17:19:53)
> +void
> +brw_enable_obj_preemption(struct brw_context *brw, bool enable)
> +{
> +   const struct gen_device_info *devinfo = &brw->screen->devinfo;
> +   assert(devinfo->gen >= 9);
> +
> +   if (enable == brw->object_preemption)
> +      return;
> +
> +   /* A fixed function pipe flush is required before modifying this field */
> +   brw_emit_pipe_control_flush(brw, PIPE_CONTROL_FLUSH_ENABLE);
> +
> +   bool replay_mode = enable ?
> +      GEN9_REPLAY_MODE_MIDOBJECT : GEN9_REPLAY_MODE_MIDBUFFER;
> +
> +   /* enable object level preemption */
> +   brw_load_register_imm32(brw, CS_CHICKEN1,
> +                           replay_mode | GEN9_REPLAY_MODE_MASK);
> +
> +   brw->object_preemption = enable;
> +}
> +
>  static void
>  brw_upload_initial_gpu_state(struct brw_context *brw)
>  {
> @@ -153,6 +175,9 @@ brw_upload_initial_gpu_state(struct brw_context *brw)
>           ADVANCE_BATCH();
>        }
>     }
> +
> +   if (devinfo->gen >= 10)

brw->object_preemption = false;

> +      brw_enable_obj_preemption(brw, true);

To force the LRI despite what the context may believe. (To accommodate
recreating a logical context following a GPU hang.)
-Chris
On Mon, Oct 29, 2018 at 05:29:10PM +0000, Chris Wilson wrote:
> Quoting Rafael Antognolli (2018-10-29 17:19:53)
> > +void
> > +brw_enable_obj_preemption(struct brw_context *brw, bool enable)
> > +{
> > +   const struct gen_device_info *devinfo = &brw->screen->devinfo;
> > +   assert(devinfo->gen >= 9);
> > +
> > +   if (enable == brw->object_preemption)
> > +      return;
> > +
> > +   /* A fixed function pipe flush is required before modifying this field */
> > +   brw_emit_pipe_control_flush(brw, PIPE_CONTROL_FLUSH_ENABLE);
> > +
> > +   bool replay_mode = enable ?
> > +      GEN9_REPLAY_MODE_MIDOBJECT : GEN9_REPLAY_MODE_MIDBUFFER;
> > +
> > +   /* enable object level preemption */
> > +   brw_load_register_imm32(brw, CS_CHICKEN1,
> > +                           replay_mode | GEN9_REPLAY_MODE_MASK);
> > +
> > +   brw->object_preemption = enable;
> > +}
> > +
> >  static void
> >  brw_upload_initial_gpu_state(struct brw_context *brw)
> >  {
> > @@ -153,6 +175,9 @@ brw_upload_initial_gpu_state(struct brw_context *brw)
> >           ADVANCE_BATCH();
> >        }
> >     }
> > +
> > +   if (devinfo->gen >= 10)
> 
> brw->object_preemption = false;
> 
> > +      brw_enable_obj_preemption(brw, true);
> 
> To force the LRI despite what the context may believe. (To accommodate
> recreating a logical context following a GPU hang.)
> -Chris

Fixing it locally, thanks.

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