drm/i915/gvt: not to touch undefined registers

Submitted by Xinyun Liu on Oct. 29, 2018, 5:49 a.m.

Details

Message ID 20181029054944.13581-1-xinyun.liu@intel.com
State New
Series "drm/i915/gvt: not to touch undefined registers"
Headers show

Commit Message

Xinyun Liu Oct. 29, 2018, 5:49 a.m.
Some engines are not available for all Gens, so need to add check before
access them.

Tracked-On: projectacrn/acrn-hypervisor#1581
Signed-off-by: Xinyun Liu <xinyun.liu@intel.com>
Signed-off-by: Yakui Zhao <Yakui.Zhao@intel.com>
---
 drivers/gpu/drm/i915/gvt/mmio_context.c | 2 ++
 1 file changed, 2 insertions(+)

Patch hide | download patch | download mbox

diff --git a/drivers/gpu/drm/i915/gvt/mmio_context.c b/drivers/gpu/drm/i915/gvt/mmio_context.c
index e872f4847fbe..2693de36c557 100644
--- a/drivers/gpu/drm/i915/gvt/mmio_context.c
+++ b/drivers/gpu/drm/i915/gvt/mmio_context.c
@@ -171,6 +171,8 @@  static void load_render_mocs(struct drm_i915_private *dev_priv)
 	int ring_id, i;
 
 	for (ring_id = 0; ring_id < ARRAY_SIZE(regs); ring_id++) {
+		if (!HAS_ENGINE(dev_priv, ring_id))
+			continue;
 		offset.reg = regs[ring_id];
 		for (i = 0; i < GEN9_MOCS_SIZE; i++) {
 			gen9_render_mocs.control_table[ring_id][i] =

Comments

gvt@intel.com Oct. 29, 2018, 7:44 a.m.

Zhenyu Wang Oct. 30, 2018, 2:59 a.m.
On 2018.10.29 13:49:44 +0800, Xinyun Liu wrote:
> Some engines are not available for all Gens, so need to add check before
> access them.
> 
> Tracked-On: projectacrn/acrn-hypervisor#1581

As acrn track number is meaningless for upstream, should replace by a Fixes tag.

Good catch, looks fine to me.

> Signed-off-by: Xinyun Liu <xinyun.liu@intel.com>
> Signed-off-by: Yakui Zhao <Yakui.Zhao@intel.com>
> ---
>  drivers/gpu/drm/i915/gvt/mmio_context.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/gvt/mmio_context.c b/drivers/gpu/drm/i915/gvt/mmio_context.c
> index e872f4847fbe..2693de36c557 100644
> --- a/drivers/gpu/drm/i915/gvt/mmio_context.c
> +++ b/drivers/gpu/drm/i915/gvt/mmio_context.c
> @@ -171,6 +171,8 @@ static void load_render_mocs(struct drm_i915_private *dev_priv)
>  	int ring_id, i;
>  
>  	for (ring_id = 0; ring_id < ARRAY_SIZE(regs); ring_id++) {
> +		if (!HAS_ENGINE(dev_priv, ring_id))
> +			continue;
>  		offset.reg = regs[ring_id];
>  		for (i = 0; i < GEN9_MOCS_SIZE; i++) {
>  			gen9_render_mocs.control_table[ring_id][i] =
> -- 
> 2.19.1
> 
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