[8/8] drm/msm/hdmi: constify clk_ops structure

Submitted by Julia Lawall on Oct. 27, 2018, 5:47 a.m.

Details

Message ID 1540619262-22681-9-git-send-email-Julia.Lawall@lip6.fr
State New
Headers show
Series "constify clk_ops structure" ( rev: 1 ) in Freedreno

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Commit Message

Julia Lawall Oct. 27, 2018, 5:47 a.m.
The clk_ops structure is only stored in the ops field of a
clk_init_data structure.  This field is const, so the clk_ops
structure can be const as well.

Identified and transformed using Coccinelle.

Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>

---
 drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

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diff --git a/drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c b/drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c
index 0df504c61833..b19a520c47d5 100644
--- a/drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c
+++ b/drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c
@@ -689,7 +689,7 @@  static int hdmi_8996_pll_is_enabled(struct clk_hw *hw)
 	return pll_locked;
 }
 
-static struct clk_ops hdmi_8996_pll_ops = {
+static const struct clk_ops hdmi_8996_pll_ops = {
 	.set_rate = hdmi_8996_pll_set_clk_rate,
 	.round_rate = hdmi_8996_pll_round_rate,
 	.recalc_rate = hdmi_8996_pll_recalc_rate,