[2/2] drm/i915: Compare user's 64b GTT offset even on 32b

Submitted by Chris Wilson on Oct. 25, 2018, 9:18 a.m.

Details

Message ID 20181025091823.20571-2-chris@chris-wilson.co.uk
State Accepted
Series "Series without cover letter"
Commit 085603287452fc96376ed4888bf29f8c095d2b40
Headers show

Commit Message

Chris Wilson Oct. 25, 2018, 9:18 a.m.
Beware mixing unsigned long constants and 64b values, as on 32b the
constant will be zero extended and discard the high 32b when used as
a mask!

Reported-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108282
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: stable@vger.kernel.org
---
 drivers/gpu/drm/i915/gvt/gtt.h             | 1 -
 drivers/gpu/drm/i915/i915_gem_execbuffer.c | 2 +-
 drivers/gpu/drm/i915/i915_gem_gtt.h        | 2 ++
 3 files changed, 3 insertions(+), 2 deletions(-)

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diff --git a/drivers/gpu/drm/i915/gvt/gtt.h b/drivers/gpu/drm/i915/gvt/gtt.h
index 7a9b36176efb..bfb6f652b09f 100644
--- a/drivers/gpu/drm/i915/gvt/gtt.h
+++ b/drivers/gpu/drm/i915/gvt/gtt.h
@@ -35,7 +35,6 @@ 
 #define _GVT_GTT_H_
 
 #define I915_GTT_PAGE_SHIFT         12
-#define I915_GTT_PAGE_MASK		(~(I915_GTT_PAGE_SIZE - 1))
 
 struct intel_vgpu_mm;
 
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index f90a09b83370..1a1c04db6c80 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -460,7 +460,7 @@  eb_validate_vma(struct i915_execbuffer *eb,
 	 * any non-page-aligned or non-canonical addresses.
 	 */
 	if (unlikely(entry->flags & EXEC_OBJECT_PINNED &&
-		     entry->offset != gen8_canonical_addr(entry->offset & PAGE_MASK)))
+		     entry->offset != gen8_canonical_addr(entry->offset & I915_GTT_PAGE_MASK)))
 		return -EINVAL;
 
 	/* pad_to_size was once a reserved field, so sanitize it */
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index aa8307043036..5d2c5ba55ad8 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -49,6 +49,8 @@ 
 #define I915_GTT_PAGE_SIZE I915_GTT_PAGE_SIZE_4K
 #define I915_GTT_MAX_PAGE_SIZE I915_GTT_PAGE_SIZE_2M
 
+#define I915_GTT_PAGE_MASK -I915_GTT_PAGE_SIZE
+
 #define I915_GTT_MIN_ALIGNMENT I915_GTT_PAGE_SIZE
 
 #define I915_FENCE_REG_NONE -1

Comments

Matthew Auld Oct. 25, 2018, 5:16 p.m.
On Thu, 25 Oct 2018 at 10:18, Chris Wilson <chris@chris-wilson.co.uk> wrote:
>
> Beware mixing unsigned long constants and 64b values, as on 32b the
> constant will be zero extended and discard the high 32b when used as
> a mask!
>
> Reported-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108282
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: stable@vger.kernel.org
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Lionel Landwerlin Nov. 14, 2018, 11:52 a.m.
Reminds me that we should probably update the uAPI...

struct drm_i915_gem_exec_object2 has a u64 flags and all the 
EXEC_OBJECT_* flags are (1<<X)

-
Lionel

On 25/10/2018 10:18, Chris Wilson wrote:
> Beware mixing unsigned long constants and 64b values, as on 32b the
> constant will be zero extended and discard the high 32b when used as
> a mask!
>
> Reported-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108282
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: stable@vger.kernel.org
> ---
>   drivers/gpu/drm/i915/gvt/gtt.h             | 1 -
>   drivers/gpu/drm/i915/i915_gem_execbuffer.c | 2 +-
>   drivers/gpu/drm/i915/i915_gem_gtt.h        | 2 ++
>   3 files changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gvt/gtt.h b/drivers/gpu/drm/i915/gvt/gtt.h
> index 7a9b36176efb..bfb6f652b09f 100644
> --- a/drivers/gpu/drm/i915/gvt/gtt.h
> +++ b/drivers/gpu/drm/i915/gvt/gtt.h
> @@ -35,7 +35,6 @@
>   #define _GVT_GTT_H_
>   
>   #define I915_GTT_PAGE_SHIFT         12
> -#define I915_GTT_PAGE_MASK		(~(I915_GTT_PAGE_SIZE - 1))
>   
>   struct intel_vgpu_mm;
>   
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index f90a09b83370..1a1c04db6c80 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -460,7 +460,7 @@ eb_validate_vma(struct i915_execbuffer *eb,
>   	 * any non-page-aligned or non-canonical addresses.
>   	 */
>   	if (unlikely(entry->flags & EXEC_OBJECT_PINNED &&
> -		     entry->offset != gen8_canonical_addr(entry->offset & PAGE_MASK)))
> +		     entry->offset != gen8_canonical_addr(entry->offset & I915_GTT_PAGE_MASK)))
>   		return -EINVAL;
>   
>   	/* pad_to_size was once a reserved field, so sanitize it */
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
> index aa8307043036..5d2c5ba55ad8 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.h
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
> @@ -49,6 +49,8 @@
>   #define I915_GTT_PAGE_SIZE I915_GTT_PAGE_SIZE_4K
>   #define I915_GTT_MAX_PAGE_SIZE I915_GTT_PAGE_SIZE_2M
>   
> +#define I915_GTT_PAGE_MASK -I915_GTT_PAGE_SIZE
> +
>   #define I915_GTT_MIN_ALIGNMENT I915_GTT_PAGE_SIZE
>   
>   #define I915_FENCE_REG_NONE -1