[v2] radeonsi: fix a radeon kernel clear state error

Submitted by Jiang, Sonny on Oct. 19, 2018, 2:45 p.m.

Details

Message ID 20181019144443.13205-1-sonny.jiang@amd.com
State New
Headers show
Series "radeonsi: fix a radeon kernel clear state error" ( rev: 2 ) in Mesa

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Commit Message

Jiang, Sonny Oct. 19, 2018, 2:45 p.m.
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
---
 src/gallium/drivers/radeonsi/si_pipe.c  | 6 ++++--
 src/gallium/drivers/radeonsi/si_state.c | 5 +++--
 2 files changed, 7 insertions(+), 4 deletions(-)

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diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 9d25748df4..a82171c2dc 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -991,8 +991,10 @@  struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws,
 	}
 
 	/* The mere presense of CLEAR_STATE in the IB causes random GPU hangs
-	 * on SI. */
-	sscreen->has_clear_state = sscreen->info.chip_class >= CIK;
+	 * on SI. Some CLEAR_STATE cause asic hang on radeon kernel, etc.
+	 * SPI_VS_OUT_CONFIG. So only enable CI CLEAR_STATE on amdgpu kernel.*/
+	sscreen->has_clear_state = sscreen->info.chip_class >= CIK &&
+				   sscreen->info.drm_major == 3;
 
 	sscreen->has_distributed_tess =
 		sscreen->info.chip_class >= VI &&
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 8b2e6e57f4..cd43276b50 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -4899,8 +4899,9 @@  static void si_init_config(struct si_context *sctx)
 	bool has_clear_state = sscreen->has_clear_state;
 	struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state);
 
-	/* Only SI can disable CLEAR_STATE for now. */
-	assert(has_clear_state || sscreen->info.chip_class == SI);
+	/* SI, radeon kernel disabled CLEAR_STATE. */
+	assert(has_clear_state || sscreen->info.chip_class == SI ||
+	       sscreen->info.drm_major != 3);
 
 	if (!pm4)
 		return;

Comments

On 2018-10-19 4:45 p.m., Jiang, Sonny wrote:
> Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>

Something like

radeonsi: Disable clear state with radeon kernel driver

might be a better shortlog. Also, please add

Fixes: f243980f2c1e "radeonsi:optimizing SET_CONTEXT_REG for shaders VS"

to the commit log.


> diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
> index 9d25748df4..a82171c2dc 100644
> --- a/src/gallium/drivers/radeonsi/si_pipe.c
> +++ b/src/gallium/drivers/radeonsi/si_pipe.c
> @@ -991,8 +991,10 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws,
>  	}
>  
>  	/* The mere presense of CLEAR_STATE in the IB causes random GPU hangs
> -	 * on SI. */
> -	sscreen->has_clear_state = sscreen->info.chip_class >= CIK;
> +	 * on SI. Some CLEAR_STATE cause asic hang on radeon kernel, etc.
> +	 * SPI_VS_OUT_CONFIG. So only enable CI CLEAR_STATE on amdgpu kernel.*/

"SPI_VS_OUT_CONFIG." looks like a leftover.


Anyway,

Tested-by: Michel Dänzer <michel.daenzer@amd.com>

Thanks!