drm/amdgpu: Limit the max mc address to AMDGPU_VA_HOLE_START

Submitted by Deng, Emily on Sept. 29, 2018, 9:48 a.m.

Details

Message ID 1538214518-14646-1-git-send-email-Emily.Deng@amd.com
State New
Headers show
Series "drm/amdgpu: Limit the max mc address to AMDGPU_VA_HOLE_START" ( rev: 1 ) in AMD X.Org drivers

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Commit Message

Deng, Emily Sept. 29, 2018, 9:48 a.m.
For the vram_start is 0 case, the gart range will be from 0x0000FFFF00000000
to 0x0000FFFF1FFFFFFF, which will cause the sdma engine hang.

So limit the mc address to AMDGPU_VA_HOLE_START.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

Patch hide | download patch | download mbox

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
index 9a5b252..7245260 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
@@ -146,6 +146,7 @@  void amdgpu_gmc_gart_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc)
 {
 	const uint64_t four_gb = 0x100000000ULL;
 	u64 size_af, size_bf;
+	u64 max_mc_address = min(adev->gmc.mc_mask, AMDGPU_VA_HOLE_START);
 
 	mc->gart_size += adev->pm.smu_prv_buffer_size;
 
@@ -153,7 +154,7 @@  void amdgpu_gmc_gart_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc)
 	 * the GART base on a 4GB boundary as well.
 	 */
 	size_bf = mc->fb_start;
-	size_af = adev->gmc.mc_mask + 1 - ALIGN(mc->fb_end + 1, four_gb);
+	size_af = max_mc_address + 1 - ALIGN(mc->fb_end + 1, four_gb);
 
 	if (mc->gart_size > max(size_bf, size_af)) {
 		dev_warn(adev->dev, "limiting GART\n");
@@ -164,7 +165,7 @@  void amdgpu_gmc_gart_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc)
 	    (size_af < mc->gart_size))
 		mc->gart_start = 0;
 	else
-		mc->gart_start = mc->mc_mask - mc->gart_size + 1;
+		mc->gart_start = max_mc_address - mc->gart_size + 1;
 
 	mc->gart_start &= ~(four_gb - 1);
 	mc->gart_end = mc->gart_start + mc->gart_size - 1;

Comments

Am 29.09.2018 um 11:48 schrieb Emily Deng:
> For the vram_start is 0 case, the gart range will be from 0x0000FFFF00000000
> to 0x0000FFFF1FFFFFFF, which will cause the sdma engine hang.
>
> So limit the mc address to AMDGPU_VA_HOLE_START.

Well NAK, but that's what I've done initially as well :)

That stuff should now be handled by amdgpu_gmc_sign_extend(), but looks 
like that is missing somewhere.

I can take a look tomorrow, most likely just a one liner somewhere.

Christian.

>
> Signed-off-by: Emily Deng <Emily.Deng@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 5 +++--
>   1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> index 9a5b252..7245260 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> @@ -146,6 +146,7 @@ void amdgpu_gmc_gart_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc)
>   {
>   	const uint64_t four_gb = 0x100000000ULL;
>   	u64 size_af, size_bf;
> +	u64 max_mc_address = min(adev->gmc.mc_mask, AMDGPU_VA_HOLE_START);
>   
>   	mc->gart_size += adev->pm.smu_prv_buffer_size;
>   
> @@ -153,7 +154,7 @@ void amdgpu_gmc_gart_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc)
>   	 * the GART base on a 4GB boundary as well.
>   	 */
>   	size_bf = mc->fb_start;
> -	size_af = adev->gmc.mc_mask + 1 - ALIGN(mc->fb_end + 1, four_gb);
> +	size_af = max_mc_address + 1 - ALIGN(mc->fb_end + 1, four_gb);
>   
>   	if (mc->gart_size > max(size_bf, size_af)) {
>   		dev_warn(adev->dev, "limiting GART\n");
> @@ -164,7 +165,7 @@ void amdgpu_gmc_gart_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc)
>   	    (size_af < mc->gart_size))
>   		mc->gart_start = 0;
>   	else
> -		mc->gart_start = mc->mc_mask - mc->gart_size + 1;
> +		mc->gart_start = max_mc_address - mc->gart_size + 1;
>   
>   	mc->gart_start &= ~(four_gb - 1);
>   	mc->gart_end = mc->gart_start + mc->gart_size - 1;
Looks like not only the SDMA has a problem with this, but also the VCE 
firmware :(

Please add a comment to explain why we do this, with that done the patch 
is Reviewed-by: Christian König <christian.koenig@amd.com>.

Regards,
Christian.

Am 03.10.2018 um 16:39 schrieb Christian König:
> Am 29.09.2018 um 11:48 schrieb Emily Deng:
>> For the vram_start is 0 case, the gart range will be from 
>> 0x0000FFFF00000000
>> to 0x0000FFFF1FFFFFFF, which will cause the sdma engine hang.
>>
>> So limit the mc address to AMDGPU_VA_HOLE_START.
>
> Well NAK, but that's what I've done initially as well :)
>
> That stuff should now be handled by amdgpu_gmc_sign_extend(), but 
> looks like that is missing somewhere.
>
> I can take a look tomorrow, most likely just a one liner somewhere.
>
> Christian.
>
>>
>> Signed-off-by: Emily Deng <Emily.Deng@amd.com>
>> ---
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 5 +++--
>>   1 file changed, 3 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c 
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
>> index 9a5b252..7245260 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
>> @@ -146,6 +146,7 @@ void amdgpu_gmc_gart_location(struct 
>> amdgpu_device *adev, struct amdgpu_gmc *mc)
>>   {
>>       const uint64_t four_gb = 0x100000000ULL;
>>       u64 size_af, size_bf;
>> +    u64 max_mc_address = min(adev->gmc.mc_mask, AMDGPU_VA_HOLE_START);
>>         mc->gart_size += adev->pm.smu_prv_buffer_size;
>>   @@ -153,7 +154,7 @@ void amdgpu_gmc_gart_location(struct 
>> amdgpu_device *adev, struct amdgpu_gmc *mc)
>>        * the GART base on a 4GB boundary as well.
>>        */
>>       size_bf = mc->fb_start;
>> -    size_af = adev->gmc.mc_mask + 1 - ALIGN(mc->fb_end + 1, four_gb);
>> +    size_af = max_mc_address + 1 - ALIGN(mc->fb_end + 1, four_gb);
>>         if (mc->gart_size > max(size_bf, size_af)) {
>>           dev_warn(adev->dev, "limiting GART\n");
>> @@ -164,7 +165,7 @@ void amdgpu_gmc_gart_location(struct 
>> amdgpu_device *adev, struct amdgpu_gmc *mc)
>>           (size_af < mc->gart_size))
>>           mc->gart_start = 0;
>>       else
>> -        mc->gart_start = mc->mc_mask - mc->gart_size + 1;
>> +        mc->gart_start = max_mc_address - mc->gart_size + 1;
>>         mc->gart_start &= ~(four_gb - 1);
>>       mc->gart_end = mc->gart_start + mc->gart_size - 1;
>