[03/10] drm/i915: make GEN4 intel GPU series configurable

Submitted by Andi Shyti on Sept. 12, 2018, 1:18 p.m.

Details

Message ID 20180912131821.21339-3-andi.shyti@intel.com
State New
Headers show
Series "Series without cover letter" ( rev: 1 ) in Intel GFX - Try Bot

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Commit Message

Andi Shyti Sept. 12, 2018, 1:18 p.m.
GEN4 consists of:

  i965g
  i965gm
  g45
  gm45

GPUs

Signed-off-by: Andi Shyti <andi.shyti@intel.com>
---
 drivers/gpu/drm/i915/Kconfig     |  2 +-
 drivers/gpu/drm/i915/Kconfig.sel | 37 ++++++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/i915_drv.h  | 10 ++++-----
 drivers/gpu/drm/i915/i915_pci.c  | 18 ++++++++++++++++
 4 files changed, 61 insertions(+), 6 deletions(-)

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diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig
index e82551d71177..9e6cdf066675 100644
--- a/drivers/gpu/drm/i915/Kconfig
+++ b/drivers/gpu/drm/i915/Kconfig
@@ -28,7 +28,7 @@  config DRM_I915
 	help
 	  Choose this option if you have a system that has "Intel Graphics
 	  Media Accelerator" or "HD Graphics" integrated graphics,
-	  including 965G, G41, G43, G45 chipsets and Celeron, Pentium, Core i3,
+	  including G41, G43, chipsets and Celeron, Pentium, Core i3,
 	  Core i5, Core i7 as well as Atom CPUs with integrated graphics.
 
 	  This driver is used by the Intel driver in X.org 6.8 and
diff --git a/drivers/gpu/drm/i915/Kconfig.sel b/drivers/gpu/drm/i915/Kconfig.sel
index e2450a6844c6..009896073e45 100644
--- a/drivers/gpu/drm/i915/Kconfig.sel
+++ b/drivers/gpu/drm/i915/Kconfig.sel
@@ -87,3 +87,40 @@  config DRM_INTEL_PINEVIEW
 	select DRM_INTEL_GEN3
 	help
 	  Choose this option if you have an Pine View gpu
+
+comment "Intel GEN4"
+
+config DRM_INTEL_GEN4
+	bool
+
+config DRM_INTEL_I965G
+	bool "Intel i965G GPU"
+	default y
+	depends on DRM_I915
+	select DRM_INTEL_GEN4
+	help
+	  Choose this option if you have an i965G gpu
+
+config DRM_INTEL_I965GM
+	bool "Intel i965GM GPU"
+	default y
+	depends on DRM_I915
+	select DRM_INTEL_GEN4
+	help
+	  Choose this option if you have an i965GM gpu
+
+config DRM_INTEL_G45
+	bool "Intel G45 GPU"
+	default y
+	depends on DRM_I915
+	select DRM_INTEL_GEN4
+	help
+	  Choose this option if you have an G45 gpu
+
+config DRM_INTEL_GM45
+	bool "Intel GM45 GPU"
+	default y
+	depends on DRM_I915
+	select DRM_INTEL_GEN4
+	help
+	  Choose this option if you have an GM45 gpu
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 05eabcf2b454..dd1f7a979d0e 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2383,10 +2383,10 @@  intel_info(const struct drm_i915_private *dev_priv)
 #define IS_I915GM(dev_priv)	IS_SELECTED_PLATFORM(dev_priv, INTEL_I915GM)
 #define IS_I945G(dev_priv)	IS_SELECTED_PLATFORM(dev_priv, INTEL_I945G)
 #define IS_I945GM(dev_priv)	IS_SELECTED_PLATFORM(dev_priv, INTEL_I945GM)
-#define IS_I965G(dev_priv)	IS_PLATFORM(dev_priv, INTEL_I965G)
-#define IS_I965GM(dev_priv)	IS_PLATFORM(dev_priv, INTEL_I965GM)
-#define IS_G45(dev_priv)	IS_PLATFORM(dev_priv, INTEL_G45)
-#define IS_GM45(dev_priv)	IS_PLATFORM(dev_priv, INTEL_GM45)
+#define IS_I965G(dev_priv)	IS_SELECTED_PLATFORM(dev_priv, INTEL_I965G)
+#define IS_I965GM(dev_priv)	IS_SELECTED_PLATFORM(dev_priv, INTEL_I965GM)
+#define IS_G45(dev_priv)	IS_SELECTED_PLATFORM(dev_priv, INTEL_G45)
+#define IS_GM45(dev_priv)	IS_SELECTED_PLATFORM(dev_priv, INTEL_GM45)
 #define IS_G4X(dev_priv)	(IS_G45(dev_priv) || IS_GM45(dev_priv))
 #define IS_PINEVIEW_G(dev_priv)	IS_SELECTED_ID(dev_priv, INTEL_PINEVIEW, 0xa001)
 #define IS_PINEVIEW_M(dev_priv)	IS_SELECTED_ID(dev_priv, INTEL_PINEVIEW, 0xa011)
@@ -2520,7 +2520,6 @@  intel_info(const struct drm_i915_private *dev_priv)
  * have their own (e.g. HAS_PCH_SPLIT for ILK+ display, IS_foo for particular
  * chips, etc.).
  */
-#define IS_GEN4(dev_priv)	(!!((dev_priv)->info.gen_mask & BIT(3)))
 #define IS_GEN5(dev_priv)	(!!((dev_priv)->info.gen_mask & BIT(4)))
 #define IS_GEN6(dev_priv)	(!!((dev_priv)->info.gen_mask & BIT(5)))
 #define IS_GEN7(dev_priv)	(!!((dev_priv)->info.gen_mask & BIT(6)))
@@ -2533,6 +2532,7 @@  intel_info(const struct drm_i915_private *dev_priv)
 
 #define IS_GEN2(dev_priv)	__IS_GEN_X(2, dev_priv)
 #define IS_GEN3(dev_priv)	__IS_GEN_X(3, dev_priv)
+#define IS_GEN4(dev_priv)	__IS_GEN_X(4, dev_priv)
 
 #define IS_LP(dev_priv)	(INTEL_INFO(dev_priv)->is_lp)
 #define IS_GEN9_LP(dev_priv)	(IS_GEN9(dev_priv) && IS_LP(dev_priv))
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index f99f3530d13c..41bd765709a1 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -198,6 +198,7 @@  static const struct intel_device_info intel_pineview_info = {
 };
 #endif
 
+#ifdef CONFIG_DRM_INTEL_GEN4
 #define GEN4_FEATURES \
 	GEN(4), \
 	.num_pipes = 2, \
@@ -209,7 +210,9 @@  static const struct intel_device_info intel_pineview_info = {
 	GEN_DEFAULT_PIPEOFFSETS, \
 	GEN_DEFAULT_PAGE_SIZES, \
 	CURSOR_OFFSETS
+#endif
 
+#ifdef CONFIG_DRM_INTEL_I965G
 static const struct intel_device_info intel_i965g_info = {
 	GEN4_FEATURES,
 	PLATFORM(INTEL_I965G),
@@ -217,7 +220,9 @@  static const struct intel_device_info intel_i965g_info = {
 	.hws_needs_physical = 1,
 	.has_snoop = false,
 };
+#endif
 
+#ifdef CONFIG_DRM_INTEL_I965GM
 static const struct intel_device_info intel_i965gm_info = {
 	GEN4_FEATURES,
 	PLATFORM(INTEL_I965GM),
@@ -227,13 +232,17 @@  static const struct intel_device_info intel_i965gm_info = {
 	.hws_needs_physical = 1,
 	.has_snoop = false,
 };
+#endif
 
+#ifdef CONFIG_DRM_INTEL_G45
 static const struct intel_device_info intel_g45_info = {
 	GEN4_FEATURES,
 	PLATFORM(INTEL_G45),
 	.ring_mask = RENDER_RING | BSD_RING,
 };
+#endif
 
+#ifdef CONFIG_DRM_INTEL_GM45
 static const struct intel_device_info intel_gm45_info = {
 	GEN4_FEATURES,
 	PLATFORM(INTEL_GM45),
@@ -241,6 +250,7 @@  static const struct intel_device_info intel_gm45_info = {
 	.supports_tv = 1,
 	.ring_mask = RENDER_RING | BSD_RING,
 };
+#endif
 
 #define GEN5_FEATURES \
 	GEN(5), \
@@ -667,13 +677,21 @@  static const struct pci_device_id pciidlist[] = {
 #ifdef CONFIG_DRM_INTEL_I945GM
 	INTEL_I945GM_IDS(&intel_i945gm_info),
 #endif
+#ifdef CONFIG_DRM_INTEL_I965G
 	INTEL_I965G_IDS(&intel_i965g_info),
+#endif
 #ifdef CONFIG_DRM_INTEL_G33
 	INTEL_G33_IDS(&intel_g33_info),
 #endif
+#ifdef CONFIG_DRM_INTEL_I965GM
 	INTEL_I965GM_IDS(&intel_i965gm_info),
+#endif
+#ifdef CONFIG_DRM_INTEL_GM45
 	INTEL_GM45_IDS(&intel_gm45_info),
+#endif
+#ifdef CONFIG_DRM_INTEL_G45
 	INTEL_G45_IDS(&intel_g45_info),
+#endif
 #ifdef CONFIG_DRM_INTEL_PINEVIEW
 	INTEL_PINEVIEW_IDS(&intel_pineview_info),
 #endif