[10/10] drm/i915: make GEN11 intel GPU series configurable

Submitted by Andi Shyti on Sept. 12, 2018, 1:18 p.m.

Details

Message ID 20180912131821.21339-10-andi.shyti@intel.com
State New
Headers show
Series "Series without cover letter" ( rev: 1 ) in Intel GFX - Try Bot

Not browsing as part of any series.

Commit Message

Andi Shyti Sept. 12, 2018, 1:18 p.m.
GEN11 cosists of

  Ice Lake

GPU.

Signed-off-by: Andi Shyti <andi.shyti@intel.com>
---
 drivers/gpu/drm/i915/Kconfig.sel | 11 ++++++++++-
 drivers/gpu/drm/i915/i915_drv.h  |  4 ++--
 drivers/gpu/drm/i915/i915_pci.c  |  6 ++++++
 3 files changed, 18 insertions(+), 3 deletions(-)

Patch hide | download patch | download mbox

diff --git a/drivers/gpu/drm/i915/Kconfig.sel b/drivers/gpu/drm/i915/Kconfig.sel
index 9b44e4becec9..4f82affd285d 100644
--- a/drivers/gpu/drm/i915/Kconfig.sel
+++ b/drivers/gpu/drm/i915/Kconfig.sel
@@ -270,7 +270,16 @@  config DRM_INTEL_CANNONLAKE
 	help
 	  Choose this option if you have a Cannon Lake gpu
 
+comment "Intel GEN11"
+
 config DRM_INTEL_GEN11
 	bool
-	default y
 	select DRM_INTEL_GEN10
+
+config DRM_INTEL_ICELAKE
+	bool "Intel Ice Lake GPU"
+	default y
+	depends on DRM_I915
+	select DRM_INTEL_GEN11
+	help
+	  Choose this option if you have an Ice Lake gpu
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 10485fbb4600..87819384203a 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2409,7 +2409,7 @@  intel_info(const struct drm_i915_private *dev_priv)
 #define IS_GEMINILAKE(dev_priv)	IS_SELECTED_PLATFORM(dev_priv, INTEL_GEMINILAKE)
 #define IS_COFFEELAKE(dev_priv)	IS_SELECTED_PLATFORM(dev_priv, INTEL_COFFEELAKE)
 #define IS_CANNONLAKE(dev_priv)	IS_SELECTED_PLATFORM(dev_priv, INTEL_CANNONLAKE)
-#define IS_ICELAKE(dev_priv)	IS_PLATFORM(dev_priv, INTEL_ICELAKE)
+#define IS_ICELAKE(dev_priv)	IS_SELECTED_PLATFORM(dev_priv, INTEL_ICELAKE)
 #define IS_MOBILE(dev_priv)	((dev_priv)->info.is_mobile)
 #define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
 				    (INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
@@ -2523,7 +2523,6 @@  intel_info(const struct drm_i915_private *dev_priv)
  * have their own (e.g. HAS_PCH_SPLIT for ILK+ display, IS_foo for particular
  * chips, etc.).
  */
-#define IS_GEN11(dev_priv)	(!!((dev_priv)->info.gen_mask & BIT(10)))
 #define __IS_GEN_X(N, dev_priv)	__and(IS_ENABLED(CONFIG_DRIM_I915_GEN##N), \
 				!!((dev_priv)->info.gen_mask & BIT(N-1)))
 
@@ -2536,6 +2535,7 @@  intel_info(const struct drm_i915_private *dev_priv)
 #define IS_GEN8(dev_priv)	__IS_GEN_X(8, dev_priv)
 #define IS_GEN9(dev_priv)	__IS_GEN_X(9, dev_priv)
 #define IS_GEN10(dev_priv)	__IS_GEN_X(10, dev_priv)
+#define IS_GEN11(dev_priv)	__IS_GEN_X(11, dev_priv)
 
 #define IS_LP(dev_priv)	(INTEL_INFO(dev_priv)->is_lp)
 #define IS_GEN9_LP(dev_priv)	(IS_GEN9(dev_priv) && IS_LP(dev_priv))
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index ce6008719869..730b016cdeb5 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -670,18 +670,22 @@  static const struct intel_device_info intel_cannonlake_info = {
 };
 #endif
 
+#ifdef CONFIG_DRM_INTEL_GEN11
 #define GEN11_FEATURES \
 	GEN10_FEATURES, \
 	GEN(11), \
 	.ddb_size = 2048, \
 	.has_logical_ring_elsq = 1
+#endif
 
+#ifdef CONFIG_DRM_INTEL_ICELAKE
 static const struct intel_device_info intel_icelake_11_info = {
 	GEN11_FEATURES,
 	PLATFORM(INTEL_ICELAKE),
 	.is_alpha_support = 1,
 	.ring_mask = RENDER_RING | BLT_RING | VEBOX_RING | BSD_RING | BSD3_RING,
 };
+#endif
 
 #undef GEN
 #undef PLATFORM
@@ -801,7 +805,9 @@  static const struct pci_device_id pciidlist[] = {
 #ifdef CONFIG_DRM_INTEL_CANNONLAKE
 	INTEL_CNL_IDS(&intel_cannonlake_info),
 #endif
+#ifdef CONFIG_DRM_INTEL_ICELAKE
 	INTEL_ICL_11_IDS(&intel_icelake_11_info),
+#endif
 	{0, 0, 0}
 };
 MODULE_DEVICE_TABLE(pci, pciidlist);