[03/15] r600: fix HTILE for NPOT textures with mipmapping

Submitted by Marek Olšák on Aug. 29, 2018, 8:12 p.m.

Details

Message ID 20180829201311.13215-4-maraeo@gmail.com
State New
Headers show
Series "RadeonSI Fixes and Cleanups" ( rev: 1 ) in Mesa

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Commit Message

Marek Olšák Aug. 29, 2018, 8:12 p.m.
From: Marek Olšák <marek.olsak@amd.com>

Cc: 18.1 18.2 <mesa-stable@lists.freedesktop.org>
---
 src/gallium/drivers/r600/r600_texture.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

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diff --git a/src/gallium/drivers/r600/r600_texture.c b/src/gallium/drivers/r600/r600_texture.c
index 08db6bab04c..d08c6e5637c 100644
--- a/src/gallium/drivers/r600/r600_texture.c
+++ b/src/gallium/drivers/r600/r600_texture.c
@@ -767,22 +767,22 @@  static void r600_texture_get_htile_size(struct r600_common_screen *rscreen,
 		break;
 	case 16:
 		cl_width = 128;
 		cl_height = 64;
 		break;
 	default:
 		assert(0);
 		return;
 	}
 
-	width = align(rtex->resource.b.b.width0, cl_width * 8);
-	height = align(rtex->resource.b.b.height0, cl_height * 8);
+	width = align(rtex->surface.u.legacy.level[0].nblk_x, cl_width * 8);
+	height = align(rtex->surface.u.legacy.level[0].nblk_y, cl_height * 8);
 
 	slice_elements = (width * height) / (8 * 8);
 	slice_bytes = slice_elements * 4;
 
 	pipe_interleave_bytes = rscreen->info.pipe_interleave_bytes;
 	base_align = num_pipes * pipe_interleave_bytes;
 
 	rtex->surface.htile_alignment = base_align;
 	rtex->surface.htile_size =
 		util_num_layers(&rtex->resource.b.b, 0) *