drm/i915/gvt: Missed to cancel dma map for ggtt entries

Submitted by changbin.du@intel.com on March 20, 2018, 5:43 a.m.

Details

Message ID 1521524584-1715-1-git-send-email-changbin.du@intel.com
State New
Headers show
Series "drm/i915/gvt: Missed to cancel dma map for ggtt entries" ( rev: 1 ) in Intel GVT devel

Not browsing as part of any series.

Commit Message

changbin.du@intel.com March 20, 2018, 5:43 a.m.
From: Changbin Du <changbin.du@intel.com>

We have canceled dma map for ppgtt entries. Ditto, don't
forget ggtt entries.

Signed-off-by: Changbin Du <changbin.du@intel.com>
---
 drivers/gpu/drm/i915/gvt/gtt.c | 26 ++++++++++++++++++++++----
 1 file changed, 22 insertions(+), 4 deletions(-)

Patch hide | download patch | download mbox

diff --git a/drivers/gpu/drm/i915/gvt/gtt.c b/drivers/gpu/drm/i915/gvt/gtt.c
index d292812..cf81206 100644
--- a/drivers/gpu/drm/i915/gvt/gtt.c
+++ b/drivers/gpu/drm/i915/gvt/gtt.c
@@ -530,6 +530,16 @@  static void ggtt_set_guest_entry(struct intel_vgpu_mm *mm,
 			   false, 0, mm->vgpu);
 }
 
+static void ggtt_get_host_entry(struct intel_vgpu_mm *mm,
+		struct intel_gvt_gtt_entry *entry, unsigned long index)
+{
+	struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops;
+
+	GEM_BUG_ON(mm->type != INTEL_GVT_MM_GGTT);
+
+	pte_ops->get_entry(NULL, entry, index, false, 0, mm->vgpu);
+}
+
 static void ggtt_set_host_entry(struct intel_vgpu_mm *mm,
 		struct intel_gvt_gtt_entry *entry, unsigned long index)
 {
@@ -1826,7 +1836,7 @@  static int emulate_ggtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off,
 	struct intel_vgpu_mm *ggtt_mm = vgpu->gtt.ggtt_mm;
 	struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;
 	unsigned long g_gtt_index = off >> info->gtt_entry_size_shift;
-	unsigned long gma, gfn;
+	unsigned long gma, gfn, pfn;
 	struct intel_gvt_gtt_entry e, m;
 	dma_addr_t dma_addr;
 	int ret;
@@ -1844,10 +1854,10 @@  static int emulate_ggtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off,
 
 	memcpy((void *)&e.val64 + (off & (info->gtt_entry_size - 1)), p_data,
 			bytes);
-	m = e;
 
 	if (ops->test_present(&e)) {
 		gfn = ops->get_pfn(&e);
+		m = e;
 
 		/* one PTE update may be issued in multiple writes and the
 		 * first write may not construct a valid gfn
@@ -1868,8 +1878,16 @@  static int emulate_ggtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off,
 			ops->set_pfn(&m, gvt->gtt.scratch_mfn);
 		} else
 			ops->set_pfn(&m, dma_addr >> PAGE_SHIFT);
-	} else
-		ops->set_pfn(&m, gvt->gtt.scratch_mfn);
+	} else {
+		ggtt_get_host_entry(ggtt_mm, &m, g_gtt_index);
+		pfn = ops->get_pfn(&m);
+		if (pfn != gvt->gtt.scratch_mfn) {
+			intel_gvt_hypervisor_dma_unmap_guest_page(vgpu,
+							pfn << PAGE_SHIFT);
+			ops->set_pfn(&m, gvt->gtt.scratch_mfn);
+		}
+		ops->clear_present(&m);
+	}
 
 out:
 	ggtt_set_host_entry(ggtt_mm, &m, g_gtt_index);