[3/5] intel: get a cached bucket by size

Submitted by James Xiong on March 16, 2018, 1:20 a.m.

Details

Message ID 1521163214-13521-4-git-send-email-james.xiong@intel.com
State New
Headers show
Series "improve reuse implementation" ( rev: 2 ) in libdrm - Intel

Not browsing as part of any series.

Commit Message

James Xiong March 16, 2018, 1:20 a.m.
From: "Xiong, James" <james.xiong@intel.com>

cached buckets are sorted by size in increasing order, each now
contains cached buffers with different sizes. A buffer with size
>= buckets[n].size and < buckets[n+1].size is put in bucket n
for future reuse.

Signed-off-by: Xiong, James <james.xiong@intel.com>
---
 intel/intel_bufmgr_gem.c | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

Patch hide | download patch | download mbox

diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index 2fcb0a0..f8317a4 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -402,11 +402,10 @@  drm_intel_gem_bo_bucket_for_size(drm_intel_bufmgr_gem *bufmgr_gem,
 {
 	int i;
 
-	for (i = 0; i < bufmgr_gem->num_buckets; i++) {
-		struct drm_intel_gem_bo_bucket *bucket =
-		    &bufmgr_gem->cache_bucket[i];
-		if (bucket->size >= size) {
-			return bucket;
+	for (i = 0; i < bufmgr_gem->num_buckets - 1; i++) {
+		if (size >= bufmgr_gem->cache_bucket[i].size &&
+		    size < bufmgr_gem->cache_bucket[i+1].size) {
+			return &bufmgr_gem->cache_bucket[i];
 		}
 	}