[v2,2/4] anv/gen10: Enable object level preemption.

Submitted by Rafael Antognolli on March 15, 2018, 10:22 p.m.

Details

Message ID 20180315222223.4652-3-rafael.antognolli@intel.com
State New
Headers show
Series "Enable object level preemption" ( rev: 1 ) in Mesa

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Commit Message

Rafael Antognolli March 15, 2018, 10:22 p.m.
Set bit when initializing a device.

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
---
 src/intel/vulkan/genX_state.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

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diff --git a/src/intel/vulkan/genX_state.c b/src/intel/vulkan/genX_state.c
index c6e54046910..3b5ac10b4cd 100644
--- a/src/intel/vulkan/genX_state.c
+++ b/src/intel/vulkan/genX_state.c
@@ -169,6 +169,24 @@  genX(init_device_state)(struct anv_device *device)
    gen10_emit_wa_lri_to_cache_mode_zero(&batch);
 #endif
 
+#if GEN_GEN >= 10
+   /* A fixed function pipe flush is required before modifying this field */
+   anv_batch_emit(&batch, GENX(PIPE_CONTROL), pipe) {
+      pipe.PipeControlFlushEnable = true;
+   }
+
+   /* enable object level preemption */
+   uint32_t csc1;
+
+   anv_pack_struct(&csc1, GENX(CS_CHICKEN1),
+                   .ReplayMode = ObjectLevelPreemption,
+                   .ReplayModeMask = 1);
+   anv_batch_emit(&batch, GENX(MI_LOAD_REGISTER_IMM), lri) {
+      lri.RegisterOffset   = GENX(CS_CHICKEN1_num);
+      lri.DataDWord        = csc1;
+   }
+#endif
+
    anv_batch_emit(&batch, GENX(MI_BATCH_BUFFER_END), bbe);
 
    assert(batch.next <= batch.end);