drm/i915/dp: clean up leftover references to CHV HBR2 support

Submitted by Jani Nikula on March 2, 2018, 2:56 p.m.

Details

Message ID 20180302145640.28352-1-jani.nikula@intel.com
State New
Headers show
Series "drm/i915/dp: clean up leftover references to CHV HBR2 support" ( rev: 1 ) in Intel GFX

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Commit Message

Jani Nikula March 2, 2018, 2:56 p.m.
No such thing as CHV HBR2. Clean up after commit ed63baaf849e
("drm/i915: Avoid TP3 on CHV").

Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c | 2 --
 1 file changed, 2 deletions(-)

Patch hide | download patch | download mbox

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index aba2f45819d8..33946f830641 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -92,8 +92,6 @@  static const struct dp_link_dpll chv_dpll[] = {
 		{ .p1 = 4, .p2 = 2, .n = 1, .m1 = 2, .m2 = 0x819999a } },
 	{ 270000,	/* m2_int = 27, m2_fraction = 0 */
 		{ .p1 = 4, .p2 = 1, .n = 1, .m1 = 2, .m2 = 0x6c00000 } },
-	{ 540000,	/* m2_int = 27, m2_fraction = 0 */
-		{ .p1 = 2, .p2 = 1, .n = 1, .m1 = 2, .m2 = 0x6c00000 } }
 };
 
 /**

Comments

On Fri, 02 Mar 2018, Jani Nikula <jani.nikula@intel.com> wrote:
> No such thing as CHV HBR2. Clean up after commit ed63baaf849e
> ("drm/i915: Avoid TP3 on CHV").
>
> Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

This is garbage. See Ville's patch [1] instead.

BR,
Jani.


[1] http://patchwork.freedesktop.org/patch/msgid/20180302095656.19662-1-ville.syrjala@linux.intel.com


> ---
>  drivers/gpu/drm/i915/intel_dp.c | 2 --
>  1 file changed, 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index aba2f45819d8..33946f830641 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -92,8 +92,6 @@ static const struct dp_link_dpll chv_dpll[] = {
>  		{ .p1 = 4, .p2 = 2, .n = 1, .m1 = 2, .m2 = 0x819999a } },
>  	{ 270000,	/* m2_int = 27, m2_fraction = 0 */
>  		{ .p1 = 4, .p2 = 1, .n = 1, .m1 = 2, .m2 = 0x6c00000 } },
> -	{ 540000,	/* m2_int = 27, m2_fraction = 0 */
> -		{ .p1 = 2, .p2 = 1, .n = 1, .m1 = 2, .m2 = 0x6c00000 } }
>  };
>  
>  /**