[3/8] drm/i915/gvt: Fix vGPU sched timeslice calculation warning

Submitted by Wang, Zhi A on Feb. 28, 2018, 11:37 a.m.

Details

Message ID F3B0350DF4CB6849A642218320DE483D7D6DC182@SHSMSX104.ccr.corp.intel.com
State New
Headers show
Series "Series without cover letter" ( rev: 1 ) in Intel GVT devel

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Commit Message

Wang, Zhi A Feb. 28, 2018, 11:37 a.m.
Reviewed-by: Zhi Wang <zhi.a.wang@intel.com>


-----Original Message-----
From: intel-gvt-dev [mailto:intel-gvt-dev-bounces@lists.freedesktop.org] On Behalf Of Zhenyu Wang

Sent: Thursday, February 22, 2018 3:16 PM
To: intel-gvt-dev@lists.freedesktop.org
Subject: [PATCH 3/8] drm/i915/gvt: Fix vGPU sched timeslice calculation warning

Fix below warning by using proper ktime helper to calculate timeslice.

CHECK   drivers/gpu/drm/i915//gvt/sched_policy.c
drivers/gpu/drm/i915//gvt/sched_policy.c:108 gvt_balance_timeslice() debug: sval_binop_signed: invalid divide LLONG_MIN/-1
drivers/gpu/drm/i915//gvt/sched_policy.c:108 gvt_balance_timeslice() debug: sval_binop_signed: invalid divide LLONG_MIN/-1

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>

---
 drivers/gpu/drm/i915/gvt/sched_policy.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

-- 
2.16.1

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diff --git a/drivers/gpu/drm/i915/gvt/sched_policy.c b/drivers/gpu/drm/i915/gvt/sched_policy.c
index cc1ce361cd76..75b7bc7b344c 100644
--- a/drivers/gpu/drm/i915/gvt/sched_policy.c
+++ b/drivers/gpu/drm/i915/gvt/sched_policy.c
@@ -103,9 +103,8 @@  static void gvt_balance_timeslice(struct gvt_sched_data *sched_data)
 
 		list_for_each(pos, &sched_data->lru_runq_head) {
 			vgpu_data = container_of(pos, struct vgpu_sched_data, lru_list);
-			fair_timeslice = ms_to_ktime(GVT_TS_BALANCE_PERIOD_MS) *
-						vgpu_data->sched_ctl.weight /
-						total_weight;
+			fair_timeslice = ktime_divns(ms_to_ktime(GVT_TS_BALANCE_PERIOD_MS),
+						     total_weight) * vgpu_data->sched_ctl.weight;
 
 			vgpu_data->allocated_ts = fair_timeslice;
 			vgpu_data->left_ts = vgpu_data->allocated_ts;