[v3,01/13] anv/image: Do not override lower bits of dword.

Submitted by Rafael Antognolli on Feb. 21, 2018, 9:45 p.m.

Details

Message ID 20180221214522.25065-2-rafael.antognolli@intel.com
State New
Headers show
Series "Use clear color address in surface state." ( rev: 2 ) in Mesa

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Commit Message

Rafael Antognolli Feb. 21, 2018, 9:45 p.m.
The lower bits seem to have extra fields in every platform but gen8
(even though we don't use them in gen9). So just go ahead and avoid
using them for the address.

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
---
 src/intel/vulkan/anv_image.c | 30 +++++++++++++++++-------------
 1 file changed, 17 insertions(+), 13 deletions(-)

Patch hide | download patch | download mbox

diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
index a297cc47320..a0aee43bd21 100644
--- a/src/intel/vulkan/anv_image.c
+++ b/src/intel/vulkan/anv_image.c
@@ -1117,19 +1117,23 @@  anv_image_fill_surface_state(struct anv_device *device,
                           .x_offset_sa = tile_x_sa,
                           .y_offset_sa = tile_y_sa);
       state_inout->address = address + offset_B;
-      if (device->info.gen >= 8) {
-         state_inout->aux_address = aux_address;
-      } else {
-         /* On gen7 and prior, the bottom 12 bits of the MCS base address are
-          * used to store other information.  This should be ok, however,
-          * because surface buffer addresses are always 4K page alinged.
-          */
-         uint32_t *aux_addr_dw = state_inout->state.map +
-                                 device->isl_dev.ss.aux_addr_offset;
-         assert((aux_address & 0xfff) == 0);
-         assert(aux_address == (*aux_addr_dw & 0xfffff000));
-         state_inout->aux_address = *aux_addr_dw;
-      }
+
+      /* On gen7 and prior, the bottom 12 bits of the MCS base address are
+       * used to store other information.  This should be ok, however,
+       * because surface buffer addresses are always 4K page alinged.
+       *
+       * On gen9, the bottom 10 bits can be used, but we don't use them. On
+       * gen10 the bit 10 needs to be used.
+       *
+       * Since the trend seems to be that we might end up using them anyway
+       * (gen8 being the only exception), just always make sure they don't get
+       * overriden by the address.
+       */
+      uint32_t *aux_addr_dw = state_inout->state.map +
+         device->isl_dev.ss.aux_addr_offset;
+      assert((aux_address & 0xfff) == 0);
+      assert(aux_address == (*aux_addr_dw & 0xfffff000));
+      state_inout->aux_address = *aux_addr_dw;
    }
 
    anv_state_flush(device, state_inout->state);

Comments

On Wed, Feb 21, 2018 at 1:45 PM, Rafael Antognolli <
rafael.antognolli@intel.com> wrote:

> The lower bits seem to have extra fields in every platform but gen8
> (even though we don't use them in gen9). So just go ahead and avoid
> using them for the address.
>
> Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
> ---
>  src/intel/vulkan/anv_image.c | 30 +++++++++++++++++-------------
>  1 file changed, 17 insertions(+), 13 deletions(-)
>
> diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
> index a297cc47320..a0aee43bd21 100644
> --- a/src/intel/vulkan/anv_image.c
> +++ b/src/intel/vulkan/anv_image.c
> @@ -1117,19 +1117,23 @@ anv_image_fill_surface_state(struct anv_device
> *device,
>                            .x_offset_sa = tile_x_sa,
>                            .y_offset_sa = tile_y_sa);
>        state_inout->address = address + offset_B;
> -      if (device->info.gen >= 8) {
> -         state_inout->aux_address = aux_address;
> -      } else {
> -         /* On gen7 and prior, the bottom 12 bits of the MCS base address
> are
> -          * used to store other information.  This should be ok, however,
> -          * because surface buffer addresses are always 4K page alinged.
> -          */
> -         uint32_t *aux_addr_dw = state_inout->state.map +
> -                                 device->isl_dev.ss.aux_addr_offset;
> -         assert((aux_address & 0xfff) == 0);
> -         assert(aux_address == (*aux_addr_dw & 0xfffff000));
> -         state_inout->aux_address = *aux_addr_dw;
> -      }
> +
> +      /* On gen7 and prior, the bottom 12 bits of the MCS base address are
> +       * used to store other information.  This should be ok, however,
> +       * because surface buffer addresses are always 4K page alinged.
> +       *
> +       * On gen9, the bottom 10 bits can be used, but we don't use them.
> On
> +       * gen10 the bit 10 needs to be used.
> +       *
> +       * Since the trend seems to be that we might end up using them
> anyway
> +       * (gen8 being the only exception), just always make sure they
> don't get
> +       * overriden by the address.
>

You could say something a bit simpler like replacing the entire comment
with:

With the exception of gen8, the bottom 12 bits of the MCS base address are
used to store other information.  This should be ok, however, because the
surface buffer addresses are always 4K page aligned.

If we're going to just handle it on all gens, I see no reson to have a huge
discussion of the history.


> +       */
> +      uint32_t *aux_addr_dw = state_inout->state.map +
> +         device->isl_dev.ss.aux_addr_offset;
>

I had to think about endianness to make sure you were getting the right 32
bits in the gen8+ case, but you are.  :-)

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>


> +      assert((aux_address & 0xfff) == 0);
> +      assert(aux_address == (*aux_addr_dw & 0xfffff000));
> +      state_inout->aux_address = *aux_addr_dw;
>     }
>
>     anv_state_flush(device, state_inout->state);
> --
> 2.14.3
>
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