[6/8] i965/blorp: Update the fast clear color entry buffer.

Submitted by Rafael Antognolli on Dec. 15, 2017, 10:53 p.m.

Details

Message ID 20171215225335.28009-6-rafael.antognolli@intel.com
State New
Headers show
Series "Series without cover letter" ( rev: 1 ) in Mesa

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Commit Message

Rafael Antognolli Dec. 15, 2017, 10:53 p.m.
On Gen10, whenever the fast clear color changes, update it on the clear
color entry buffer. This allow us to use it directly when emitting the
surface state.

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
---
 src/mesa/drivers/dri/i965/brw_blorp.c | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

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diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c
index 680121b6ab1..9ca5626ba91 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.c
+++ b/src/mesa/drivers/dri/i965/brw_blorp.c
@@ -1135,6 +1135,27 @@  set_write_disables(const struct intel_renderbuffer *irb,
    return disables;
 }
 
+static void
+update_fast_clear_color(struct brw_context *brw,
+                        struct blorp_surf *surf,
+                        const union isl_color_value clear_color)
+{
+   assert(surf);
+   /* Clear values are stored at the same bo as the aux surface, right
+    * after the surface.
+    */
+   uint32_t clear_offset = surf->aux_addr.offset + surf->aux_surf->size;
+   for (int i = 0; i < brw->isl_dev.ss.clear_value_size; i++) {
+      brw_store_data_imm32(brw, surf->aux_addr.buffer,
+                           clear_offset + i * 4, clear_color.u32[i]);
+   }
+
+   surf->clear_color_addr = (struct blorp_address) {
+      .buffer = surf->aux_addr.buffer,
+      .offset = clear_offset,
+   };
+}
+
 static void
 do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,
                       struct gl_renderbuffer *rb, unsigned buf,
@@ -1230,6 +1251,11 @@  do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,
       blorp_surf_for_miptree(brw, &surf, irb->mt, irb->mt->aux_usage, true,
                              &level, irb->mt_layer, num_layers, isl_tmp);
 
+      /* update clear color */
+      const struct gen_device_info *devinfo = &brw->screen->devinfo;
+      if (devinfo->gen >= 10 && !same_clear_color)
+         update_fast_clear_color(brw, &surf, clear_color);
+
       /* Ivybrigde PRM Vol 2, Part 1, "11.7 MCS Buffer for Render Target(s)":
        *
        *    "Any transition from any value in {Clear, Render, Resolve} to a