[2/2] radv: disable implicit sync for radv allocated bos v2

Submitted by Andres Rodriguez on Oct. 20, 2017, 10:42 p.m.

Details

Message ID 20171020224213.15693-3-andresx7@gmail.com
State New
Headers show
Series "Use explicit sync for non-dri BOs" ( rev: 1 ) in Mesa

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Commit Message

Andres Rodriguez Oct. 20, 2017, 10:42 p.m.
Implicit sync kicks in when a buffer is used by two different amdgpu
contexts simultaneously. Jobs that use explicit synchronization
mechanisms end up needlessly waiting to be scheduled for long periods
of time in order to achieve serialized execution.

This patch disables implicit synchronization for all radv allocations
except for wsi bos. The only systems that require implicit
synchronization are DRI2/3 and PRIME.

v2: mark wsi bos as RADV_MEM_IMPLICIT_SYNC

Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
---
 src/amd/vulkan/radv_device.c                  | 3 +++
 src/amd/vulkan/radv_radeon_winsys.h           | 1 +
 src/amd/vulkan/radv_wsi.c                     | 3 ++-
 src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c | 2 ++
 4 files changed, 8 insertions(+), 1 deletion(-)

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diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 5e6e9dc..c4e2522 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -2115,6 +2115,9 @@  VkResult radv_alloc_memory(VkDevice                        _device,
 	if (pAllocateInfo->memoryTypeIndex == RADV_MEM_TYPE_GTT_WRITE_COMBINE)
 		flags |= RADEON_FLAG_GTT_WC;
 
+	if (mem_flags & RADV_MEM_IMPLICIT_SYNC)
+		flags |= RADEON_FLAG_IMPLICIT_SYNC;
+
 	mem->bo = device->ws->buffer_create(device->ws, alloc_size, device->physical_device->rad_info.max_alignment,
 					       domain, flags);
 
diff --git a/src/amd/vulkan/radv_radeon_winsys.h b/src/amd/vulkan/radv_radeon_winsys.h
index 328b8a1..cf5a9e8 100644
--- a/src/amd/vulkan/radv_radeon_winsys.h
+++ b/src/amd/vulkan/radv_radeon_winsys.h
@@ -53,6 +53,7 @@  enum radeon_bo_flag { /* bitfield */
 	RADEON_FLAG_NO_CPU_ACCESS = (1 << 2),
 	RADEON_FLAG_VIRTUAL =       (1 << 3),
 	RADEON_FLAG_VA_UNCACHED =   (1 << 4),
+	RADEON_FLAG_IMPLICIT_SYNC = (1 << 5),
 };
 
 enum radeon_bo_usage { /* bitfield */
diff --git a/src/amd/vulkan/radv_wsi.c b/src/amd/vulkan/radv_wsi.c
index c9d4bbc..b65ef27 100644
--- a/src/amd/vulkan/radv_wsi.c
+++ b/src/amd/vulkan/radv_wsi.c
@@ -194,7 +194,7 @@  radv_wsi_image_create(VkDevice device_h,
 		.image = image_h
 	};
 
-	result = radv_AllocateMemory(device_h,
+	result = radv_alloc_memory(device_h,
 				     &(VkMemoryAllocateInfo) {
 					     .sType = VK_STRUCTURE_TYPE_MEMORY_ALLOCATE_INFO,
 					     .pNext = &ded_alloc,
@@ -202,6 +202,7 @@  radv_wsi_image_create(VkDevice device_h,
 					     .memoryTypeIndex = linear ? 1 : 0,
 				     },
 				     NULL /* XXX: pAllocator */,
+				     RADV_MEM_IMPLICIT_SYNC,
 				     &memory_h);
 	if (result != VK_SUCCESS)
 		goto fail_create_image;
diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c
index bffb76b..9281911 100644
--- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c
+++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c
@@ -330,6 +330,8 @@  radv_amdgpu_winsys_bo_create(struct radeon_winsys *_ws,
 		request.flags |= AMDGPU_GEM_CREATE_NO_CPU_ACCESS;
 	if (flags & RADEON_FLAG_GTT_WC)
 		request.flags |= AMDGPU_GEM_CREATE_CPU_GTT_USWC;
+	if (!(flags & RADEON_FLAG_IMPLICIT_SYNC))
+		request.flags |= AMDGPU_GEM_CREATE_EXPLICIT_SYNC;
 
 	/* this won't do anything on pre 4.9 kernels */
 	if (ws->zero_all_vram_allocs && (initial_domain & RADEON_DOMAIN_VRAM))