i-g-t/tests: Drop gem_seqno_wrap, gem_pin, gem_hangcheck_forcewake

Submitted by Abdiel Janulgue on Oct. 10, 2017, 8:55 a.m.

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Message ID 1507625747-28529-1-git-send-email-abdiel.janulgue@linux.intel.com
State New
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Series "i-g-t/tests: Drop gem_seqno_wrap, gem_pin, gem_hangcheck_forcewake" ( rev: 1 ) in Intel GFX

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Commit Message

Abdiel Janulgue Oct. 10, 2017, 8:55 a.m.
This improves the GEM tests section of I-G-T to make it more
suitable for CI testing

Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
---
 tests/Makefile.sources          |   3 -
 tests/gem_hangcheck_forcewake.c | 123 ----------
 tests/gem_pin.c                 | 248 ---------------------
 tests/gem_seqno_wrap.c          | 483 ----------------------------------------
 tests/meson.build               |   3 -
 5 files changed, 860 deletions(-)
 delete mode 100644 tests/gem_hangcheck_forcewake.c
 delete mode 100644 tests/gem_pin.c
 delete mode 100644 tests/gem_seqno_wrap.c

Patch hide | download patch | download mbox

diff --git a/tests/Makefile.sources b/tests/Makefile.sources
index bb6652e..7f52298 100644
--- a/tests/Makefile.sources
+++ b/tests/Makefile.sources
@@ -99,7 +99,6 @@  TESTS_progs = \
 	gem_gtt_cpu_tlb \
 	gem_gtt_hog \
 	gem_gtt_speed \
-	gem_hangcheck_forcewake \
 	gem_largeobject \
 	gem_linear_blits \
 	gem_lut_handle \
@@ -112,7 +111,6 @@  TESTS_progs = \
 	gem_mocs_settings \
 	gem_partial_pwrite_pread \
 	gem_persistent_relocs \
-	gem_pin \
 	gem_pipe_control_store_loop \
 	gem_ppgtt \
 	gem_pread \
@@ -134,7 +132,6 @@  TESTS_progs = \
 	gem_ring_sync_copy \
 	gem_ring_sync_loop \
 	gem_ringfill \
-	gem_seqno_wrap \
 	gem_set_tiling_vs_blt \
 	gem_set_tiling_vs_gtt \
 	gem_set_tiling_vs_pwrite \
diff --git a/tests/gem_hangcheck_forcewake.c b/tests/gem_hangcheck_forcewake.c
deleted file mode 100644
index a3e7554..0000000
--- a/tests/gem_hangcheck_forcewake.c
+++ /dev/null
@@ -1,123 +0,0 @@ 
-/*
- * Copyright © 2011 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- *
- * Authors:
- *    Daniel Vetter <daniel.vetter@ffwll.ch>
- *
- */
-
-#include "igt.h"
-#include <stdlib.h>
-#include <stdio.h>
-#include <string.h>
-#include <fcntl.h>
-#include <inttypes.h>
-#include <errno.h>
-#include <sys/stat.h>
-#include <sys/time.h>
-#include "drm.h"
-#include "intel_bufmgr.h"
-
-IGT_TEST_DESCRIPTION("Provoke the hangcheck timer on an otherwise idle"
-		     " system.");
-
-/*
- * Testcase: Provoke the hangcheck timer on an otherwise idle system
- *
- * This tries to hit forcewake locking bugs when the hangcheck runs. Somehow we
- * often luck out and the hangcheck runs while someone else is already holding
- * the dev->struct_mutex.
- *
- * It's imperative that nothing else runs while this test runs, i.e. kill your X
- * session, please.
- */
-
-static drm_intel_bufmgr *bufmgr;
-struct intel_batchbuffer *batch;
-
-uint32_t blob[2048*2048];
-
-#define MAX_BLT_SIZE 128
-igt_simple_main
-{
-	drm_intel_bo *bo = NULL;
-	uint32_t tiling_mode = I915_TILING_X;
-	unsigned long pitch, act_size;
-	int fd, i, devid;
-
-	igt_skip_on_simulation();
-
-	memset(blob, 'A', sizeof(blob));
-
-	fd = drm_open_driver(DRIVER_INTEL);
-	igt_require_gem(fd);
-
-	bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
-	drm_intel_bufmgr_gem_enable_reuse(bufmgr);
-	devid = intel_get_drm_devid(fd);
-	batch = intel_batchbuffer_alloc(bufmgr, devid);
-
-	act_size = 2048;
-	igt_info("filling ring\n");
-	drm_intel_bo_unreference(bo);
-	bo = drm_intel_bo_alloc_tiled(bufmgr, "tiled bo", act_size, act_size,
-				      4, &tiling_mode, &pitch, 0);
-
-	drm_intel_bo_subdata(bo, 0, act_size*act_size*4, blob);
-
-	if (IS_965(devid))
-		pitch /= 4;
-
-	for (i = 0; i < 10000; i++) {
-		BLIT_COPY_BATCH_START(XY_SRC_COPY_BLT_SRC_TILED |
-				      XY_SRC_COPY_BLT_DST_TILED);
-		OUT_BATCH((3 << 24) | /* 32 bits */
-			  (0xcc << 16) | /* copy ROP */
-			  pitch);
-		OUT_BATCH(0 << 16 | 1024);
-		OUT_BATCH((2048) << 16 | (2048));
-		OUT_RELOC_FENCED(bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-		OUT_BATCH(0 << 16 | 0);
-		OUT_BATCH(pitch);
-		OUT_RELOC_FENCED(bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-		ADVANCE_BATCH();
-
-		if (batch->gen >= 6) {
-			BEGIN_BATCH(3, 0);
-			OUT_BATCH(XY_SETUP_CLIP_BLT_CMD);
-			OUT_BATCH(0);
-			OUT_BATCH(0);
-			ADVANCE_BATCH();
-		}
-	}
-
-	igt_info("waiting\n");
-	sleep(10);
-
-	igt_info("done waiting, check dmesg\n");
-	drm_intel_bo_unreference(bo);
-
-	intel_batchbuffer_free(batch);
-	drm_intel_bufmgr_destroy(bufmgr);
-
-	close(fd);
-}
diff --git a/tests/gem_pin.c b/tests/gem_pin.c
deleted file mode 100644
index 9ea3b1e..0000000
--- a/tests/gem_pin.c
+++ /dev/null
@@ -1,248 +0,0 @@ 
-/*
- * Copyright © 20013 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- *
- * Authors:
- *    Chris Wilson <chris@chris-wilson.co.uk>
- *
- */
-
-/* Exercises pinning of small bo */
-
-#include "igt.h"
-#include <stdlib.h>
-#include <stdio.h>
-#include <string.h>
-#include <fcntl.h>
-#include <inttypes.h>
-#include <errno.h>
-#include <sys/stat.h>
-#include <sys/time.h>
-
-#include <drm.h>
-
-
-IGT_TEST_DESCRIPTION("Exercises pinning of small buffer objects.");
-
-#define COPY_BLT_CMD            (2<<29|0x53<<22|0x6)
-#define BLT_WRITE_ALPHA         (1<<21)
-#define BLT_WRITE_RGB           (1<<20)
-
-static void exec(int fd, uint32_t handle, uint32_t offset)
-{
-	struct drm_i915_gem_execbuffer2 execbuf;
-	struct drm_i915_gem_exec_object2 gem_exec[1];
-	struct drm_i915_gem_relocation_entry gem_reloc[1];
-
-	gem_reloc[0].offset = 1024;
-	gem_reloc[0].delta = 0;
-	gem_reloc[0].target_handle = handle;
-	gem_reloc[0].read_domains = I915_GEM_DOMAIN_RENDER;
-	gem_reloc[0].write_domain = 0;
-	gem_reloc[0].presumed_offset = 0;
-
-	gem_exec[0].handle = handle;
-	gem_exec[0].relocation_count = 1;
-	gem_exec[0].relocs_ptr = to_user_pointer(gem_reloc);
-	gem_exec[0].alignment = 0;
-	gem_exec[0].offset = 0;
-	gem_exec[0].flags = 0;
-	gem_exec[0].rsvd1 = 0;
-	gem_exec[0].rsvd2 = 0;
-
-	execbuf.buffers_ptr = to_user_pointer(gem_exec);
-	execbuf.buffer_count = 1;
-	execbuf.batch_start_offset = 0;
-	execbuf.batch_len = 8;
-	execbuf.cliprects_ptr = 0;
-	execbuf.num_cliprects = 0;
-	execbuf.DR1 = 0;
-	execbuf.DR4 = 0;
-	execbuf.flags = 0;
-	i915_execbuffer2_set_context_id(execbuf, 0);
-	execbuf.rsvd2 = 0;
-
-	do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
-	igt_assert(gem_exec[0].offset == offset);
-}
-
-static int gem_linear_blt(int fd,
-			  uint32_t *batch,
-			  uint32_t src,
-			  uint32_t dst,
-			  uint32_t length,
-			  struct drm_i915_gem_relocation_entry *reloc)
-{
-	uint32_t *b = batch;
-
-	*b++ = COPY_BLT_CMD | BLT_WRITE_ALPHA | BLT_WRITE_RGB;
-	*b++ = 0x66 << 16 | 1 << 25 | 1 << 24 | (4*1024);
-	*b++ = 0;
-	*b++ = (length / (4*1024)) << 16 | 1024;
-	*b++ = 0;
-	reloc->offset = (b-batch-1) * sizeof(uint32_t);
-	reloc->delta = 0;
-	reloc->target_handle = dst;
-	reloc->read_domains = I915_GEM_DOMAIN_RENDER;
-	reloc->write_domain = I915_GEM_DOMAIN_RENDER;
-	reloc->presumed_offset = 0;
-	reloc++;
-	if (intel_gen(intel_get_drm_devid(fd)) >= 8)
-		*b++ = 0; /* FIXME */
-
-	*b++ = 0;
-	*b++ = 4*1024;
-	*b++ = 0;
-	reloc->offset = (b-batch-1) * sizeof(uint32_t);
-	reloc->delta = 0;
-	reloc->target_handle = src;
-	reloc->read_domains = I915_GEM_DOMAIN_RENDER;
-	reloc->write_domain = 0;
-	reloc->presumed_offset = 0;
-	reloc++;
-	if (intel_gen(intel_get_drm_devid(fd)) >= 8)
-		*b++ = 0; /* FIXME */
-
-	*b++ = MI_BATCH_BUFFER_END;
-	*b++ = 0;
-
-	return (b - batch) * sizeof(uint32_t);
-}
-
-static void make_busy(int fd, uint32_t handle)
-{
-	struct drm_i915_gem_execbuffer2 execbuf;
-	struct drm_i915_gem_exec_object2 obj[2];
-	struct drm_i915_gem_relocation_entry reloc[2];
-	uint32_t batch[20];
-	uint32_t tmp;
-	int count;
-
-	tmp = gem_create(fd, 1024*1024);
-
-	obj[0].handle = tmp;
-	obj[0].relocation_count = 0;
-	obj[0].relocs_ptr = 0;
-	obj[0].alignment = 0;
-	obj[0].offset = 0;
-	obj[0].flags = 0;
-	obj[0].rsvd1 = 0;
-	obj[0].rsvd2 = 0;
-
-	obj[1].handle = handle;
-	obj[1].relocation_count = 2;
-	obj[1].relocs_ptr = to_user_pointer(reloc);
-	obj[1].alignment = 0;
-	obj[1].offset = 0;
-	obj[1].flags = 0;
-	obj[1].rsvd1 = 0;
-	obj[1].rsvd2 = 0;
-
-	execbuf.buffers_ptr = to_user_pointer(obj);
-	execbuf.buffer_count = 2;
-	execbuf.batch_start_offset = 0;
-	execbuf.batch_len = gem_linear_blt(fd, batch, tmp, tmp, 1024*1024,reloc);
-	execbuf.cliprects_ptr = 0;
-	execbuf.num_cliprects = 0;
-	execbuf.DR1 = 0;
-	execbuf.DR4 = 0;
-	execbuf.flags = 0;
-	if (HAS_BLT_RING(intel_get_drm_devid(fd)))
-		execbuf.flags |= I915_EXEC_BLT;
-	i915_execbuffer2_set_context_id(execbuf, 0);
-	execbuf.rsvd2 = 0;
-
-	gem_write(fd, handle, 0, batch, execbuf.batch_len);
-	for (count = 0; count < 10; count++)
-		do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
-	gem_close(fd, tmp);
-}
-
-static int test_can_pin(int fd)
-{
-	struct drm_i915_gem_pin pin;
-	int ret;
-
-	pin.handle = gem_create(fd, 4096);;
-	pin.alignment = 0;
-	ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_PIN, &pin);
-	gem_close(fd, pin.handle);
-
-	return ret == 0;;
-}
-
-static uint32_t gem_pin(int fd, int handle, int alignment)
-{
-	struct drm_i915_gem_pin pin;
-
-	pin.handle = handle;
-	pin.alignment = alignment;
-	do_ioctl(fd, DRM_IOCTL_I915_GEM_PIN, &pin);
-	return pin.offset;
-}
-
-igt_simple_main
-{
-	const uint32_t batch[2] = {MI_BATCH_BUFFER_END};
-	struct timeval start, now;
-	uint32_t *handle, *offset;
-	int fd, i;
-
-	igt_skip_on_simulation();
-
-	fd = drm_open_driver(DRIVER_INTEL);
-
-	igt_require(test_can_pin(fd));
-
-	handle = malloc(sizeof(uint32_t)*100);
-	offset = malloc(sizeof(uint32_t)*100);
-
-	/* Race creation/use against interrupts */
-	igt_fork_signal_helper();
-	gettimeofday(&start, NULL);
-	do {
-		for (i = 0; i < 100; i++) {
-			if (i & 1) {
-				/* pin anidle bo */
-				handle[i] = gem_create(fd, 4096);
-				offset[i] = gem_pin(fd, handle[i], 0);
-				igt_assert(offset[i]);
-				gem_write(fd, handle[i], 0, batch, sizeof(batch));
-			} else {
-				/* try to pin an anidle bo */
-				handle[i] = gem_create(fd, 4096);
-				make_busy(fd, handle[i]);
-				offset[i] = gem_pin(fd, handle[i], 256*1024);
-				igt_assert(offset[i]);
-				igt_assert((offset[i] & (256*1024-1)) == 0);
-				gem_write(fd, handle[i], 0, batch, sizeof(batch));
-			}
-		}
-		for (i = 0; i < 1000; i++) {
-			int j = rand() % 100;
-			exec(fd, handle[j], offset[j]);
-		}
-		for (i = 0; i < 100; i++)
-			gem_close(fd, handle[i]);
-		gettimeofday(&now, NULL);
-	} while ((now.tv_sec - start.tv_sec)*1000 + (now.tv_usec - start.tv_usec) / 1000 < 10000);
-	igt_stop_signal_helper();
-}
diff --git a/tests/gem_seqno_wrap.c b/tests/gem_seqno_wrap.c
deleted file mode 100644
index c8cad5f..0000000
--- a/tests/gem_seqno_wrap.c
+++ /dev/null
@@ -1,483 +0,0 @@ 
-/*
- * Copyright (c) 2012 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- *
- * Authors:
- *    Mika Kuoppala <mika.kuoppala@intel.com>
- *
- */
-
-/*
- * This test runs blitcopy -> rendercopy with multiple buffers over wrap
- * boundary.
- */
-
-#include <stdlib.h>
-#include <string.h>
-#include <time.h>
-#include <fcntl.h>
-#include <unistd.h>
-#include <sys/types.h>
-#include <sys/wait.h>
-#include <limits.h>
-#include <signal.h>
-#include <errno.h>
-
-#include "igt.h"
-#include "igt_sysfs.h"
-#include "intel_bufmgr.h"
-
-IGT_TEST_DESCRIPTION("Runs blitcopy -> rendercopy with multiple buffers over"
-		     " wrap boundary.");
-
-static int drm_fd;
-static int debugfs;
-static int devid;
-static int card_index = 0;
-static uint32_t last_seqno = 0;
-
-static struct intel_batchbuffer *batch_blt;
-static struct intel_batchbuffer *batch_3d;
-
-struct option_struct {
-	int rounds;
-	int background;
-	int timeout;
-	int dontwrap;
-	int prewrap_space;
-	int random;
-	int buffers;
-};
-
-static struct option_struct options;
-
-static void init_buffer(drm_intel_bufmgr *bufmgr,
-			struct igt_buf *buf,
-			drm_intel_bo *bo,
-			int width, int height)
-{
-	/* buf->bo = drm_intel_bo_alloc(bufmgr, "", size, 4096); */
-	buf->bo = bo;
-	buf->size = width * height * 4;
-	igt_assert(buf->bo);
-	buf->tiling = I915_TILING_NONE;
-	buf->num_tiles = width * height * 4;
-	buf->stride = width * 4;
-}
-
-static void
-set_bo(drm_intel_bo *bo, uint32_t val, int width, int height)
-{
-	int size = width * height;
-	uint32_t *vaddr;
-
-	drm_intel_gem_bo_start_gtt_access(bo, true);
-	vaddr = bo->virtual;
-	while (size--)
-		*vaddr++ = val;
-}
-
-static void
-cmp_bo(drm_intel_bo *bo, uint32_t val, int width, int height)
-{
-	int size = width * height;
-	uint32_t *vaddr;
-
-	drm_intel_gem_bo_start_gtt_access(bo, false);
-	vaddr = bo->virtual;
-	while (size--) {
-		igt_assert_f(*vaddr++ == val,
-			     "%d: 0x%x differs from assumed 0x%x\n"
-			     "seqno_before_test 0x%x, "
-			     " approximated seqno on test fail 0x%x\n",
-			     width * height - size, *vaddr-1, val,
-			     last_seqno, last_seqno + val * 2);
-	}
-}
-
-static drm_intel_bo *
-create_bo(drm_intel_bufmgr *bufmgr, uint32_t val, int width, int height)
-{
-	drm_intel_bo *bo;
-
-	bo = drm_intel_bo_alloc(bufmgr, "bo", width * height * 4, 0);
-	igt_assert(bo);
-
-	/* gtt map doesn't have a write parameter, so just keep the mapping
-	 * around (to avoid the set_domain with the gtt write domain set) and
-	 * manually tell the kernel when we start access the gtt. */
-	drm_intel_gem_bo_map_gtt(bo);
-
-	set_bo(bo, val, width, height);
-
-	return bo;
-}
-
-static void release_bo(drm_intel_bo *bo)
-{
-	drm_intel_gem_bo_unmap_gtt(bo);
-	drm_intel_bo_unreference(bo);
-}
-
-static void render_copyfunc(struct igt_buf *src,
-			    struct igt_buf *dst,
-			    int width,
-			    int height)
-{
-	const int src_x = 0, src_y = 0, dst_x = 0, dst_y = 0;
-	igt_render_copyfunc_t rendercopy = igt_get_render_copyfunc(devid);
-	static int warned = 0;
-
-	if (rendercopy) {
-		rendercopy(batch_3d, NULL,
-			   src, src_x, src_y,
-			   width, height,
-			   dst, dst_x, dst_y);
-		intel_batchbuffer_flush(batch_3d);
-	} else {
-		if (!warned) {
-			igt_info("No render copy found for this gen, ""test is shallow!\n");
-			warned = 1;
-		}
-		igt_assert(dst->bo);
-		igt_assert(src->bo);
-		intel_copy_bo(batch_blt, dst->bo, src->bo, width*height*4);
-		intel_batchbuffer_flush(batch_blt);
-	}
-}
-
-static void exchange_uint(void *array, unsigned i, unsigned j)
-{
-	unsigned *i_arr = array;
-
-	igt_swap(i_arr[i], i_arr[j]);
-}
-
-static bool has_seqno_wrap(void)
-{
-	int ret = igt_sysfs_printf(debugfs, "i915_next_seqno", "0x1");
-	errno = 0;
-	return ret == 1;
-}
-
-static void run_sync_test(int num_buffers, bool verify)
-{
-	drm_intel_bufmgr *bufmgr;
-	int max;
-	drm_intel_bo **src, **dst1, **dst2;
-	int width = 128, height = 128;
-	int i;
-	unsigned int *p_dst1, *p_dst2;
-	struct igt_buf *s_src, *s_dst;
-
-	max = gem_aperture_size (drm_fd) / (1024 * 1024) / 2;
-	if (num_buffers > max)
-		num_buffers = max;
-
-	bufmgr = drm_intel_bufmgr_gem_init(drm_fd, 4096);
-	drm_intel_bufmgr_gem_enable_reuse(bufmgr);
-	batch_blt = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(drm_fd));
-	igt_assert(batch_blt);
-	batch_3d = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(drm_fd));
-	igt_assert(batch_3d);
-
-	src = malloc(num_buffers * sizeof(*src));
-	igt_assert(src);
-
-	dst1 = malloc(num_buffers * sizeof(*dst1));
-	igt_assert(dst1);
-
-	dst2 = malloc(num_buffers * sizeof(*dst2));
-	igt_assert(dst2);
-
-	s_src = malloc(num_buffers * sizeof(*s_src));
-	igt_assert(s_src);
-
-	s_dst = malloc(num_buffers * sizeof(*s_dst));
-	igt_assert(s_dst);
-
-	p_dst1 = malloc(num_buffers * sizeof(unsigned int));
-	igt_assert(p_dst1);
-
-	p_dst2 = malloc(num_buffers * sizeof(unsigned int));
-	igt_assert(p_dst2);
-
-	for (i = 0; i < num_buffers; i++) {
-		p_dst1[i] = p_dst2[i] = i;
-		src[i] = create_bo(bufmgr, i, width, height);
-		igt_assert(src[i]);
-		dst1[i] = create_bo(bufmgr, ~i, width, height);
-		igt_assert(dst1[i]);
-		dst2[i] = create_bo(bufmgr, ~i, width, height);
-		igt_assert(dst2[i]);
-		init_buffer(bufmgr, &s_src[i], src[i], width, height);
-		init_buffer(bufmgr, &s_dst[i], dst1[i], width, height);
-	}
-
-	igt_permute_array(p_dst1, num_buffers, exchange_uint);
-	igt_permute_array(p_dst2, num_buffers, exchange_uint);
-
-	for (i = 0; i < num_buffers; i++)
-		render_copyfunc(&s_src[i], &s_dst[p_dst1[i]], width, height);
-
-	/* Only sync between buffers if this is actual test run and
-	 * not a seqno filler */
-	if (verify) {
-		for (i = 0; i < num_buffers; i++)
-			intel_copy_bo(batch_blt, dst2[p_dst2[i]], dst1[p_dst1[i]],
-				      width*height*4);
-
-		for (i = 0; i < num_buffers; i++) {
-			cmp_bo(dst2[p_dst2[i]], i, width, height);
-		}
-	}
-
-	for (i = 0; i < num_buffers; i++) {
-		release_bo(src[i]);
-		release_bo(dst1[i]);
-		release_bo(dst2[i]);
-	}
-
-	intel_batchbuffer_free(batch_3d);
-	intel_batchbuffer_free(batch_blt);
-	drm_intel_bufmgr_destroy(bufmgr);
-
-	free(p_dst1);
-	free(p_dst2);
-	free(s_dst);
-	free(s_src);
-	free(dst2);
-	free(dst1);
-	free(src);
-
-	gem_quiescent_gpu(drm_fd);
-}
-
-static int __read_seqno(uint32_t *seqno)
-{
-	if (igt_sysfs_scanf(debugfs, "i915_next_seqno", "%x", seqno) != 1)
-		return -1;
-
-	igt_debug("next_seqno: 0x%x\n", *seqno);
-	return 0;
-}
-
-static int read_seqno(void)
-{
-	uint32_t seqno = 0;
-	int r;
-	int wrap = 0;
-
-	r = __read_seqno(&seqno);
-	igt_assert_eq(r, 0);
-
-	if (last_seqno > seqno)
-		wrap++;
-
-	last_seqno = seqno;
-
-	return wrap;
-}
-
-static void write_seqno(uint32_t seqno)
-{
-	uint32_t rb = -1;
-
-	if (options.dontwrap)
-		return;
-
-	igt_sysfs_printf(debugfs, "i915_next_seqno", "0x%x", seqno);
-	igt_debug("next_seqno set to: 0x%x\n", seqno);
-	last_seqno = seqno;
-
-	igt_assert_eq(__read_seqno(&rb), 0);
-	igt_assert_f(rb == seqno,
-		     "seqno readback differs, read 0x%x, expected 0x%x\n",
-		     rb, seqno);
-}
-
-static uint32_t calc_prewrap_val(void)
-{
-	const int pval = options.prewrap_space;
-
-	if (options.random == 0)
-		return pval;
-
-	if (pval == 0)
-		return 0;
-
-	return (random() % pval);
-}
-
-static void run_test(void)
-{
-	run_sync_test(options.buffers, true);
-}
-
-static void preset_run_once(void)
-{
-	write_seqno(1);
-	run_test();
-
-	write_seqno(0x7fffffff);
-	run_test();
-
-	write_seqno(0xffffffff);
-	run_test();
-
-	write_seqno(0xfffffff0);
-	run_test();
-}
-
-static void random_run_once(void)
-{
-	uint32_t val;
-
-	do {
-		val = random() % UINT32_MAX;
-		if (RAND_MAX < UINT32_MAX)
-			val += random();
-	} while (val == 0);
-
-	write_seqno(val);
-	run_test();
-}
-
-static void wrap_run_once(void)
-{
-	const uint32_t pw_val = calc_prewrap_val();
-
-	write_seqno(UINT32_MAX - pw_val);
-	while (!read_seqno())
-		run_test();
-}
-
-static void background_run_once(void)
-{
-	const uint32_t pw_val = calc_prewrap_val();
-
-	write_seqno(UINT32_MAX - pw_val);
-	while (!read_seqno())
-		sleep(3);
-}
-
-static int parse_options(int opt, int opt_index, void *data)
-{
-	switch(opt) {
-		case 'b':
-			options.background = 1;
-			igt_info("running in background inducing wraps\n");
-			break;
-		case 'd':
-			options.dontwrap = 1;
-			igt_info("won't wrap after testruns\n");
-			break;
-		case 'n':
-			options.rounds = atoi(optarg);
-			igt_info("running %d rounds\n", options.rounds);
-			break;
-		case 'i':
-			options.buffers = atoi(optarg);
-			igt_info("buffers %d\n", options.buffers);
-			break;
-		case 't':
-			options.timeout = atoi(optarg);
-			if (options.timeout == 0)
-				options.timeout = 10;
-			igt_info("setting timeout to %d seconds\n", options.timeout);
-			break;
-		case 'r':
-			options.random = 0;
-			break;
-		case 'p':
-			options.prewrap_space = atoi(optarg);
-			igt_info("prewrap set to %d (0x%x)\n", options.prewrap_space, UINT32_MAX - options.prewrap_space);
-			break;
-	}
-
-	return 0;
-}
-
-int main(int argc, char **argv)
-{
-	int wcount = 0;
-
-	static struct option long_options[] = {
-		{"rounds", required_argument, 0, 'n'},
-		{"background", no_argument, 0, 'b'},
-		{"timeout", required_argument, 0, 't'},
-		{"dontwrap", no_argument, 0, 'd'},
-		{"prewrap", required_argument, 0, 'p'},
-		{"norandom", no_argument, 0, 'r'},
-		{"buffers", required_argument, 0, 'i'},
-		{ 0, 0, 0, 0 }
-	};
-
-	const char *help =
-		"  -b --background       run in background inducing wraps\n"
-		"  -n --rounds=num       run num times across wrap boundary, 0 == forever\n"
-		"  -t --timeout=sec      set timeout to wait for testrun to sec seconds\n"
-		"  -d --dontwrap         don't wrap just run the test\n"
-		"  -p --prewrap=n        set seqno to WRAP - n for each testrun\n"
-		"  -r --norandom         dont randomize prewrap space\n"
-		"  -i --buffers          number of buffers to copy\n";
-
-	options.rounds = SLOW_QUICK(50, 2);
-	options.background = 0;
-	options.dontwrap = 0;
-	options.timeout = 20;
-	options.random = 1;
-	options.prewrap_space = 21;
-	options.buffers = 10;
-
-	igt_simple_init_parse_opts(&argc, argv, "n:bvt:dp:ri:", long_options,
-				   help, parse_options, NULL);
-
-	drm_fd = drm_open_driver(DRIVER_INTEL);
-	debugfs = igt_debugfs_dir(drm_fd);
-	igt_require(has_seqno_wrap());
-
-	gem_quiescent_gpu(drm_fd);
-
-	devid = intel_get_drm_devid(drm_fd);
-	card_index = drm_get_card();
-
-	srandom(time(NULL));
-
-	while(options.rounds == 0 || wcount < options.rounds) {
-		if (options.background) {
-			background_run_once();
-		} else {
-			preset_run_once();
-			random_run_once();
-			wrap_run_once();
-		}
-
-		wcount++;
-
-		igt_debug("%s done: %d\n",
-			  options.dontwrap ? "tests" : "wraps", wcount);
-	}
-
-	igt_assert_eq(options.rounds, wcount);
-
-	igt_exit();
-}
diff --git a/tests/meson.build b/tests/meson.build
index 6cb3584..8abc06e 100644
--- a/tests/meson.build
+++ b/tests/meson.build
@@ -79,7 +79,6 @@  test_progs = [
 	'gem_gtt_cpu_tlb',
 	'gem_gtt_hog',
 	'gem_gtt_speed',
-	'gem_hangcheck_forcewake',
 	'gem_largeobject',
 	'gem_linear_blits',
 	'gem_lut_handle',
@@ -92,7 +91,6 @@  test_progs = [
 	'gem_mocs_settings',
 	'gem_partial_pwrite_pread',
 	'gem_persistent_relocs',
-	'gem_pin',
 	'gem_pipe_control_store_loop',
 	'gem_ppgtt',
 	'gem_pread',
@@ -114,7 +112,6 @@  test_progs = [
 	'gem_ring_sync_copy',
 	'gem_ring_sync_loop',
 	'gem_ringfill',
-	'gem_seqno_wrap',
 	'gem_set_tiling_vs_blt',
 	'gem_set_tiling_vs_gtt',
 	'gem_set_tiling_vs_pwrite',

Comments

+ Chris and Mika for R-b's as they're the test authors
+ Arek, Tomi for CI blacklist reduction

On Tue, 2017-10-10 at 11:55 +0300, Abdiel Janulgue wrote:
> This improves the GEM tests section of I-G-T to make it more
> suitable for CI testing
> 
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>

For future reference, lets have the tags in chronological order.

(Suggested-by: if any) S-o-b,  Cc, Reviewed-by etc...

This checks with the test blacklisting TODO items.

Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

Arek, Tomi; After this is merged, the the following lines can be
removed from CI blacklist.

igt@gem_pin(@.*)?
igt@gem_seqno_wrap(@.*)?
igt@gem_hangcheck_forcewake(@.*)?

Regards, Joonas
On 10/10/17 01:55, Abdiel Janulgue wrote:
> This improves the GEM tests section of I-G-T to make it more
> suitable for CI testing

Can you provide a little more details on what is the rationale behind 
this choice. Are the tests being removed only because they do not fit 
the CI guidelines or is it because they do not offer any valuable coverage?

Maybe having three separate patches, one per test would be better in my 
opinion since the tests look to have not much in common.

-Antonio
Quoting Antonio Argenziano (2017-10-10 18:12:17)
> 
> 
> On 10/10/17 01:55, Abdiel Janulgue wrote:
> > This improves the GEM tests section of I-G-T to make it more
> > suitable for CI testing
> 
> Can you provide a little more details on what is the rationale behind 
> this choice. Are the tests being removed only because they do not fit 
> the CI guidelines or is it because they do not offer any valuable coverage?

Hear, hear.

gem_seqno_wrap is defunct as the debug API withered away. The
handling of wraparound under many different workloads is tested by
gem_exec_whisper. The intention is to may seqno wrap handling a
kselftest. That hasn't happened yet, gem_exec_whisper is not run wholy
by CI, but nevertheless gem_seqno_wrap is still defunct.

gem_pin is a useful ABI I still shed a tear over. But it's time has
passed and it's not coming back.

gem_hangcheck_forcewake has been superseded by drv_hangman, and a lot of
other very extensive hangchecking that is not run by CI. Something about
hang testing taking longer than the sun to go nova, and still will never
be completely reliable...
-Chris
On 10/10/17 13:19, Chris Wilson wrote:
> Quoting Antonio Argenziano (2017-10-10 18:12:17)
>>
>>
>> On 10/10/17 01:55, Abdiel Janulgue wrote:
>>> This improves the GEM tests section of I-G-T to make it more
>>> suitable for CI testing
>>
>> Can you provide a little more details on what is the rationale behind
>> this choice. Are the tests being removed only because they do not fit
>> the CI guidelines or is it because they do not offer any valuable coverage?
> 
> Hear, hear.
> 
> gem_seqno_wrap is defunct as the debug API withered away. The
> handling of wraparound under many different workloads is tested by
> gem_exec_whisper. The intention is to may seqno wrap handling a
> kselftest. That hasn't happened yet, gem_exec_whisper is not run wholy
> by CI, but nevertheless gem_seqno_wrap is still defunct.
> 
> gem_pin is a useful ABI I still shed a tear over. But it's time has
> passed and it's not coming back.
> 
> gem_hangcheck_forcewake has been superseded by drv_hangman, and a lot of
> other very extensive hangchecking that is not run by CI. Something about
> hang testing taking longer than the sun to go nova, and still will never
> be completely reliable...
> -Chris
> 

Thanks for the explanation Chris.

This convinces me more that the commit needs to be split into three 
separate patches. One for each test with an explanation of why it goes away.

-Antonio