[2/2] intel/compiler: Use emit_emplace in the builders

Submitted by Neil Roberts on Sept. 22, 2017, 3:09 p.m.

Details

Message ID 20170922150940.16039-2-bpeeluk@yahoo.co.uk
State New
Headers show
Series "Series without cover letter" ( rev: 1 ) in Mesa

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Commit Message

Neil Roberts Sept. 22, 2017, 3:09 p.m.
Replaces all calls of the form emit(instruction(…)) with
emit_emplace(…). This should avoid a redundant copy of the
stack-allocated temporary instruction. Although the temporary would
have been stack-allocated so it might not seem like a big deal, the
instructions do also have an internal allocation for the sources so we
also get to avoid an extra allocation.

I tested this with shader-db over four iterations and the average sum
of the time reported for all of the threads drops from 406 seconds to
366.
---
 src/intel/compiler/brw_fs_builder.h   | 32 ++++++++++++++++----------------
 src/intel/compiler/brw_vec4_builder.h | 28 ++++++++++++++--------------
 2 files changed, 30 insertions(+), 30 deletions(-)

Patch hide | download patch | download mbox

diff --git a/src/intel/compiler/brw_fs_builder.h b/src/intel/compiler/brw_fs_builder.h
index 90d8285..9991dd7 100644
--- a/src/intel/compiler/brw_fs_builder.h
+++ b/src/intel/compiler/brw_fs_builder.h
@@ -275,7 +275,7 @@  namespace brw {
       instruction *
       emit(enum opcode opcode) const
       {
-         return emit(instruction(opcode, dispatch_width()));
+         return emit_emplace(opcode, dispatch_width());
       }
 
       /**
@@ -284,7 +284,7 @@  namespace brw {
       instruction *
       emit(enum opcode opcode, const dst_reg &dst) const
       {
-         return emit(instruction(opcode, dispatch_width(), dst));
+         return emit_emplace(opcode, dispatch_width(), dst);
       }
 
       /**
@@ -301,11 +301,11 @@  namespace brw {
          case SHADER_OPCODE_LOG2:
          case SHADER_OPCODE_SIN:
          case SHADER_OPCODE_COS:
-            return emit(instruction(opcode, dispatch_width(), dst,
-                                    fix_math_operand(src0)));
+            return emit_emplace(opcode, dispatch_width(), dst,
+                                fix_math_operand(src0));
 
          default:
-            return emit(instruction(opcode, dispatch_width(), dst, src0));
+            return emit_emplace(opcode, dispatch_width(), dst, src0);
          }
       }
 
@@ -320,12 +320,12 @@  namespace brw {
          case SHADER_OPCODE_POW:
          case SHADER_OPCODE_INT_QUOTIENT:
          case SHADER_OPCODE_INT_REMAINDER:
-            return emit(instruction(opcode, dispatch_width(), dst,
-                                    fix_math_operand(src0),
-                                    fix_math_operand(src1)));
+            return emit_emplace(opcode, dispatch_width(), dst,
+                                fix_math_operand(src0),
+                                fix_math_operand(src1));
 
          default:
-            return emit(instruction(opcode, dispatch_width(), dst, src0, src1));
+            return emit_emplace(opcode, dispatch_width(), dst, src0, src1);
 
          }
       }
@@ -342,14 +342,14 @@  namespace brw {
          case BRW_OPCODE_BFI2:
          case BRW_OPCODE_MAD:
          case BRW_OPCODE_LRP:
-            return emit(instruction(opcode, dispatch_width(), dst,
-                                    fix_3src_operand(src0),
-                                    fix_3src_operand(src1),
-                                    fix_3src_operand(src2)));
+            return emit_emplace(opcode, dispatch_width(), dst,
+                                fix_3src_operand(src0),
+                                fix_3src_operand(src1),
+                                fix_3src_operand(src2));
 
          default:
-            return emit(instruction(opcode, dispatch_width(), dst,
-                                    src0, src1, src2));
+            return emit_emplace(opcode, dispatch_width(), dst,
+                                src0, src1, src2);
          }
       }
 
@@ -361,7 +361,7 @@  namespace brw {
       emit(enum opcode opcode, const dst_reg &dst, const src_reg srcs[],
            unsigned n) const
       {
-         return emit(instruction(opcode, dispatch_width(), dst, srcs, n));
+         return emit_emplace(opcode, dispatch_width(), dst, srcs, n);
       }
 
       /**
diff --git a/src/intel/compiler/brw_vec4_builder.h b/src/intel/compiler/brw_vec4_builder.h
index 413b27c..d802990 100644
--- a/src/intel/compiler/brw_vec4_builder.h
+++ b/src/intel/compiler/brw_vec4_builder.h
@@ -240,7 +240,7 @@  namespace brw {
       instruction *
       emit(enum opcode opcode) const
       {
-         return emit(instruction(opcode));
+         return emit_emplace(opcode);
       }
 
       /**
@@ -249,7 +249,7 @@  namespace brw {
       instruction *
       emit(enum opcode opcode, const dst_reg &dst) const
       {
-         return emit(instruction(opcode, dst));
+         return emit_emplace(opcode, dst);
       }
 
       /**
@@ -267,11 +267,11 @@  namespace brw {
          case SHADER_OPCODE_SIN:
          case SHADER_OPCODE_COS:
             return fix_math_instruction(
-               emit(instruction(opcode, dst,
-                                fix_math_operand(src0))));
+               emit_emplace(opcode, dst,
+                            fix_math_operand(src0)));
 
          default:
-            return emit(instruction(opcode, dst, src0));
+            return emit_emplace(opcode, dst, src0);
          }
       }
 
@@ -287,12 +287,12 @@  namespace brw {
          case SHADER_OPCODE_INT_QUOTIENT:
          case SHADER_OPCODE_INT_REMAINDER:
             return fix_math_instruction(
-               emit(instruction(opcode, dst,
-                                fix_math_operand(src0),
-                                fix_math_operand(src1))));
+               emit_emplace(opcode, dst,
+                            fix_math_operand(src0),
+                            fix_math_operand(src1)));
 
          default:
-            return emit(instruction(opcode, dst, src0, src1));
+            return emit_emplace(opcode, dst, src0, src1);
          }
       }
 
@@ -308,13 +308,13 @@  namespace brw {
          case BRW_OPCODE_BFI2:
          case BRW_OPCODE_MAD:
          case BRW_OPCODE_LRP:
-            return emit(instruction(opcode, dst,
-                                    fix_3src_operand(src0),
-                                    fix_3src_operand(src1),
-                                    fix_3src_operand(src2)));
+            return emit_emplace(opcode, dst,
+                                fix_3src_operand(src0),
+                                fix_3src_operand(src1),
+                                fix_3src_operand(src2));
 
          default:
-            return emit(instruction(opcode, dst, src0, src1, src2));
+            return emit_emplace(opcode, dst, src0, src1, src2);
          }
       }