[1/2] intel: Remove unused Kabylake pci ids

Submitted by Anuj Phogat on Sept. 11, 2017, 4:22 p.m.

Details

Message ID 20170911162248.983-1-anuj.phogat@gmail.com
State New
Series "Series without cover letter"
Headers show

Commit Message

Anuj Phogat Sept. 11, 2017, 4:22 p.m.
These PCI IDs are not used in any Kabylake SKUs.
See Mesa commits: ebc5ccf and b2dae9f

Cc: Matt Turner <mattst88@gmail.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
---
 intel/intel_chipset.h | 26 ++++----------------------
 1 file changed, 4 insertions(+), 22 deletions(-)

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diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
index 3ff59ad..77a9ca6 100644
--- a/intel/intel_chipset.h
+++ b/intel/intel_chipset.h
@@ -192,24 +192,16 @@ 
 #define PCI_CHIP_SKYLAKE_WKS_GT4	0x193D
 
 #define PCI_CHIP_KABYLAKE_ULT_GT2	0x5916
-#define PCI_CHIP_KABYLAKE_ULT_GT1_5	0x5913
 #define PCI_CHIP_KABYLAKE_ULT_GT1	0x5906
-#define PCI_CHIP_KABYLAKE_ULT_GT3_0	0x5923
 #define PCI_CHIP_KABYLAKE_ULT_GT3_1	0x5926
 #define PCI_CHIP_KABYLAKE_ULT_GT3_2	0x5927
 #define PCI_CHIP_KABYLAKE_ULT_GT2F	0x5921
-#define PCI_CHIP_KABYLAKE_ULX_GT1_5	0x5915
-#define PCI_CHIP_KABYLAKE_ULX_GT1	0x590E
 #define PCI_CHIP_KABYLAKE_ULX_GT2	0x591E
 #define PCI_CHIP_KABYLAKE_DT_GT2	0x5912
 #define PCI_CHIP_KABYLAKE_DT_GT1_5	0x5917
 #define PCI_CHIP_KABYLAKE_DT_GT1	0x5902
 #define PCI_CHIP_KABYLAKE_HALO_GT2	0x591B
-#define PCI_CHIP_KABYLAKE_HALO_GT4	0x593B
-#define PCI_CHIP_KABYLAKE_HALO_GT1_0	0x5908
 #define PCI_CHIP_KABYLAKE_HALO_GT1_1	0x590B
-#define PCI_CHIP_KABYLAKE_SRV_GT2	0x591A
-#define PCI_CHIP_KABYLAKE_SRV_GT1	0x590A
 #define PCI_CHIP_KABYLAKE_WKS_GT2	0x591D
 
 #define PCI_CHIP_BROXTON_0		0x0A84
@@ -432,34 +424,24 @@ 
 				 (devid) == PCI_CHIP_SKYLAKE_H_GT4	|| \
 				 (devid) == PCI_CHIP_SKYLAKE_WKS_GT4)
 
-#define IS_KBL_GT1(devid)	((devid) == PCI_CHIP_KABYLAKE_ULT_GT1_5	|| \
-				 (devid) == PCI_CHIP_KABYLAKE_ULX_GT1_5	|| \
-				 (devid) == PCI_CHIP_KABYLAKE_DT_GT1_5	|| \
+#define IS_KBL_GT1(devid)	((devid) == PCI_CHIP_KABYLAKE_DT_GT1_5	|| \
 				 (devid) == PCI_CHIP_KABYLAKE_ULT_GT1	|| \
-				 (devid) == PCI_CHIP_KABYLAKE_ULX_GT1	|| \
 				 (devid) == PCI_CHIP_KABYLAKE_DT_GT1	|| \
-				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT1_0 || \
-				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT1_1 || \
-				 (devid) == PCI_CHIP_KABYLAKE_SRV_GT1)
+				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT1_1)
 
 #define IS_KBL_GT2(devid)	((devid) == PCI_CHIP_KABYLAKE_ULT_GT2	|| \
 				 (devid) == PCI_CHIP_KABYLAKE_ULT_GT2F	|| \
 				 (devid) == PCI_CHIP_KABYLAKE_ULX_GT2	|| \
 				 (devid) == PCI_CHIP_KABYLAKE_DT_GT2	|| \
 				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT2	|| \
-				 (devid) == PCI_CHIP_KABYLAKE_SRV_GT2	|| \
 				 (devid) == PCI_CHIP_KABYLAKE_WKS_GT2)
 
-#define IS_KBL_GT3(devid)	((devid) == PCI_CHIP_KABYLAKE_ULT_GT3_0	|| \
-				 (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_1	|| \
+#define IS_KBL_GT3(devid)	((devid) == PCI_CHIP_KABYLAKE_ULT_GT3_1	|| \
 				 (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_2)
 
-#define IS_KBL_GT4(devid)	((devid) == PCI_CHIP_KABYLAKE_HALO_GT4)
-
 #define IS_KABYLAKE(devid)	(IS_KBL_GT1(devid) || \
 				 IS_KBL_GT2(devid) || \
-				 IS_KBL_GT3(devid) || \
-				 IS_KBL_GT4(devid))
+				 IS_KBL_GT3(devid))
 
 #define IS_SKYLAKE(devid)	(IS_SKL_GT1(devid) || \
 				 IS_SKL_GT2(devid) || \

Comments

Anuj Phogat Sept. 20, 2017, 8:19 p.m.
Dropping this patch.

On Mon, Sep 11, 2017 at 9:22 AM, Anuj Phogat <anuj.phogat@gmail.com> wrote:
> These PCI IDs are not used in any Kabylake SKUs.
> See Mesa commits: ebc5ccf and b2dae9f
>
> Cc: Matt Turner <mattst88@gmail.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
> ---
>  intel/intel_chipset.h | 26 ++++----------------------
>  1 file changed, 4 insertions(+), 22 deletions(-)
>
> diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
> index 3ff59ad..77a9ca6 100644
> --- a/intel/intel_chipset.h
> +++ b/intel/intel_chipset.h
> @@ -192,24 +192,16 @@
>  #define PCI_CHIP_SKYLAKE_WKS_GT4       0x193D
>
>  #define PCI_CHIP_KABYLAKE_ULT_GT2      0x5916
> -#define PCI_CHIP_KABYLAKE_ULT_GT1_5    0x5913
>  #define PCI_CHIP_KABYLAKE_ULT_GT1      0x5906
> -#define PCI_CHIP_KABYLAKE_ULT_GT3_0    0x5923
>  #define PCI_CHIP_KABYLAKE_ULT_GT3_1    0x5926
>  #define PCI_CHIP_KABYLAKE_ULT_GT3_2    0x5927
>  #define PCI_CHIP_KABYLAKE_ULT_GT2F     0x5921
> -#define PCI_CHIP_KABYLAKE_ULX_GT1_5    0x5915
> -#define PCI_CHIP_KABYLAKE_ULX_GT1      0x590E
>  #define PCI_CHIP_KABYLAKE_ULX_GT2      0x591E
>  #define PCI_CHIP_KABYLAKE_DT_GT2       0x5912
>  #define PCI_CHIP_KABYLAKE_DT_GT1_5     0x5917
>  #define PCI_CHIP_KABYLAKE_DT_GT1       0x5902
>  #define PCI_CHIP_KABYLAKE_HALO_GT2     0x591B
> -#define PCI_CHIP_KABYLAKE_HALO_GT4     0x593B
> -#define PCI_CHIP_KABYLAKE_HALO_GT1_0   0x5908
>  #define PCI_CHIP_KABYLAKE_HALO_GT1_1   0x590B
> -#define PCI_CHIP_KABYLAKE_SRV_GT2      0x591A
> -#define PCI_CHIP_KABYLAKE_SRV_GT1      0x590A
>  #define PCI_CHIP_KABYLAKE_WKS_GT2      0x591D
>
>  #define PCI_CHIP_BROXTON_0             0x0A84
> @@ -432,34 +424,24 @@
>                                  (devid) == PCI_CHIP_SKYLAKE_H_GT4      || \
>                                  (devid) == PCI_CHIP_SKYLAKE_WKS_GT4)
>
> -#define IS_KBL_GT1(devid)      ((devid) == PCI_CHIP_KABYLAKE_ULT_GT1_5 || \
> -                                (devid) == PCI_CHIP_KABYLAKE_ULX_GT1_5 || \
> -                                (devid) == PCI_CHIP_KABYLAKE_DT_GT1_5  || \
> +#define IS_KBL_GT1(devid)      ((devid) == PCI_CHIP_KABYLAKE_DT_GT1_5  || \
>                                  (devid) == PCI_CHIP_KABYLAKE_ULT_GT1   || \
> -                                (devid) == PCI_CHIP_KABYLAKE_ULX_GT1   || \
>                                  (devid) == PCI_CHIP_KABYLAKE_DT_GT1    || \
> -                                (devid) == PCI_CHIP_KABYLAKE_HALO_GT1_0 || \
> -                                (devid) == PCI_CHIP_KABYLAKE_HALO_GT1_1 || \
> -                                (devid) == PCI_CHIP_KABYLAKE_SRV_GT1)
> +                                (devid) == PCI_CHIP_KABYLAKE_HALO_GT1_1)
>
>  #define IS_KBL_GT2(devid)      ((devid) == PCI_CHIP_KABYLAKE_ULT_GT2   || \
>                                  (devid) == PCI_CHIP_KABYLAKE_ULT_GT2F  || \
>                                  (devid) == PCI_CHIP_KABYLAKE_ULX_GT2   || \
>                                  (devid) == PCI_CHIP_KABYLAKE_DT_GT2    || \
>                                  (devid) == PCI_CHIP_KABYLAKE_HALO_GT2  || \
> -                                (devid) == PCI_CHIP_KABYLAKE_SRV_GT2   || \
>                                  (devid) == PCI_CHIP_KABYLAKE_WKS_GT2)
>
> -#define IS_KBL_GT3(devid)      ((devid) == PCI_CHIP_KABYLAKE_ULT_GT3_0 || \
> -                                (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_1 || \
> +#define IS_KBL_GT3(devid)      ((devid) == PCI_CHIP_KABYLAKE_ULT_GT3_1 || \
>                                  (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_2)
>
> -#define IS_KBL_GT4(devid)      ((devid) == PCI_CHIP_KABYLAKE_HALO_GT4)
> -
>  #define IS_KABYLAKE(devid)     (IS_KBL_GT1(devid) || \
>                                  IS_KBL_GT2(devid) || \
> -                                IS_KBL_GT3(devid) || \
> -                                IS_KBL_GT4(devid))
> +                                IS_KBL_GT3(devid))
>
>  #define IS_SKYLAKE(devid)      (IS_SKL_GT1(devid) || \
>                                  IS_SKL_GT2(devid) || \
> --
> 2.9.4
>