drm/i915: Check that we disable RPS interrupts prior to suspending

Submitted by Chris Wilson on Aug. 21, 2017, 1:38 p.m.

Details

Message ID 20170821133859.27457-1-chris@chris-wilson.co.uk
State New
Headers show
Series "drm/i915: Check that we disable RPS interrupts prior to suspending" ( rev: 4 ) in Intel GFX - Try Bot

Browsing this patch as part of:
"drm/i915: Check that we disable RPS interrupts prior to suspending" rev 4 in Intel GFX - Try Bot
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Commit Message

Chris Wilson Aug. 21, 2017, 1:38 p.m.
Anytime we suspend, either at runtime or S3, check that we have disabled
the RPS interrupt generator (via PMINTRMSK). This should have been done
upon idling (see gen6_rps_idle()) prior to dropping our GT wakeref.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.c  |  2 ++
 drivers/gpu/drm/i915/intel_drv.h |  1 +
 drivers/gpu/drm/i915/intel_pm.c  | 17 +++++++++++++++++
 3 files changed, 20 insertions(+)

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diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 43100229613c..e96b74bff48d 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1531,6 +1531,7 @@  static int i915_drm_suspend(struct drm_device *dev)
 
 	intel_dp_mst_suspend(dev);
 
+	intel_check_gt_powersave(dev_priv);
 	intel_runtime_pm_disable_interrupts(dev_priv);
 	intel_hpd_cancel_work(dev_priv);
 
@@ -2488,6 +2489,7 @@  static int intel_runtime_suspend(struct device *kdev)
 
 	intel_guc_suspend(dev_priv);
 
+	intel_check_gt_powersave(dev_priv);
 	intel_runtime_pm_disable_interrupts(dev_priv);
 
 	ret = 0;
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 2940d393ecfd..eda5a31cc599 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1840,6 +1840,7 @@  void intel_enable_gt_powersave(struct drm_i915_private *dev_priv);
 void intel_autoenable_gt_powersave(struct drm_i915_private *dev_priv);
 void intel_disable_gt_powersave(struct drm_i915_private *dev_priv);
 void intel_suspend_gt_powersave(struct drm_i915_private *dev_priv);
+void intel_check_gt_powersave(struct drm_i915_private *dev_priv);
 void gen6_rps_busy(struct drm_i915_private *dev_priv);
 void gen6_rps_reset_ei(struct drm_i915_private *dev_priv);
 void gen6_rps_idle(struct drm_i915_private *dev_priv);
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 68187bcfded4..5b3ee7ad0c14 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -7805,6 +7805,23 @@  void intel_suspend_gt_powersave(struct drm_i915_private *dev_priv)
 	/* gen6_rps_idle() will be called later to disable interrupts */
 }
 
+void intel_check_gt_powersave(struct drm_i915_private *dev_priv)
+{
+	GEM_BUG_ON(dev_priv->gt.awake);
+
+	if (INTEL_GEN(dev_priv) < 6)
+		return;
+
+	if (GEM_WARN_ON(I915_READ(GEN6_PMINTRMSK) !=
+			gen6_sanitize_rps_pm_mask(dev_priv, ~0)))
+		DRM_ERROR("PMINTRMSK=%08x, expected=%08x [events=%08x mask=%08x]; rps.enabled? %s\n",
+			  I915_READ(GEN6_PMINTRMSK),
+			  gen6_sanitize_rps_pm_mask(dev_priv, ~0),
+			  dev_priv->pm_rps_events,
+			  gen6_sanitize_rps_pm_mask(dev_priv, ~dev_priv->pm_rps_events),
+			  yesno(dev_priv->rps.enabled));
+}
+
 void intel_sanitize_gt_powersave(struct drm_i915_private *dev_priv)
 {
 	dev_priv->rps.enabled = true; /* force disabling */