[6/6,v4] drm/i915: Add support for CCS modifiers

Submitted by Ben Widawsky on Aug. 1, 2017, 4:58 p.m.

Details

Message ID 20170801165817.7063-6-ben@bwidawsk.net
State New
Headers show
Series "Series without cover letter" ( rev: 1 ) in Intel GFX

Not browsing as part of any series.

Commit Message

Ben Widawsky Aug. 1, 2017, 4:58 p.m.
v2:
  - Support sprite plane.
  - Support pipe C/D limitation on GEN9.

v3:
  - Rename structure (Ville)
  - Handle GLK (Ville)

v4:
  - Fix PIPE_C check, introduced in v2 (Daniel)
  - Whitespace fix (Daniel)

Cc: Daniel Stone <daniels@collabora.com>
Cc: Kristian Høgsberg <krh@bitplanet.net>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 drivers/gpu/drm/i915/intel_display.c | 30 +++++++++++++++++++++++++++---
 drivers/gpu/drm/i915/intel_sprite.c  | 28 +++++++++++++++++++++++++++-
 2 files changed, 54 insertions(+), 4 deletions(-)

Patch hide | download patch | download mbox

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index ad49b99ef25f..0dc9f40edc7e 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -93,7 +93,17 @@  static const uint32_t skl_primary_formats[] = {
 	DRM_FORMAT_VYUY,
 };
 
-static const uint64_t skl_format_modifiers[] = {
+static const uint64_t skl_format_modifiers_noccs[] = {
+	I915_FORMAT_MOD_Yf_TILED,
+	I915_FORMAT_MOD_Y_TILED,
+	I915_FORMAT_MOD_X_TILED,
+	DRM_FORMAT_MOD_LINEAR,
+	DRM_FORMAT_MOD_INVALID
+};
+
+static const uint64_t skl_format_modifiers_ccs[] = {
+	I915_FORMAT_MOD_Yf_TILED_CCS,
+	I915_FORMAT_MOD_Y_TILED_CCS,
 	I915_FORMAT_MOD_Yf_TILED,
 	I915_FORMAT_MOD_Y_TILED,
 	I915_FORMAT_MOD_X_TILED,
@@ -13853,6 +13863,10 @@  static bool skl_mod_supported(uint32_t format, uint64_t modifier)
 	case DRM_FORMAT_XBGR8888:
 	case DRM_FORMAT_ARGB8888:
 	case DRM_FORMAT_ABGR8888:
+		if (modifier == I915_FORMAT_MOD_Yf_TILED_CCS ||
+		    modifier == I915_FORMAT_MOD_Y_TILED_CCS)
+			return true;
+		/* fall through */
 	case DRM_FORMAT_RGB565:
 	case DRM_FORMAT_XRGB2101010:
 	case DRM_FORMAT_XBGR2101010:
@@ -14099,10 +14113,20 @@  intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
 	primary->frontbuffer_bit = INTEL_FRONTBUFFER_PRIMARY(pipe);
 	primary->check_plane = intel_check_primary_plane;
 
-	if (INTEL_GEN(dev_priv) >= 9) {
+	if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) {
+		intel_primary_formats = skl_primary_formats;
+		num_formats = ARRAY_SIZE(skl_primary_formats);
+		modifiers = skl_format_modifiers_ccs;
+
+		primary->update_plane = skylake_update_primary_plane;
+		primary->disable_plane = skylake_disable_primary_plane;
+	} else if (INTEL_GEN(dev_priv) >= 9) {
 		intel_primary_formats = skl_primary_formats;
 		num_formats = ARRAY_SIZE(skl_primary_formats);
-		modifiers = skl_format_modifiers;
+		if (pipe < PIPE_C)
+			modifiers = skl_format_modifiers_ccs;
+		else
+			modifiers = skl_format_modifiers_noccs;
 
 		primary->update_plane = skylake_update_primary_plane;
 		primary->disable_plane = skylake_disable_primary_plane;
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index b1cc4835b963..5a2b3f3693a6 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -1085,7 +1085,17 @@  static uint32_t skl_plane_formats[] = {
 	DRM_FORMAT_VYUY,
 };
 
+static const uint64_t skl_plane_format_modifiers_noccs[] = {
+	I915_FORMAT_MOD_Yf_TILED,
+	I915_FORMAT_MOD_Y_TILED,
+	I915_FORMAT_MOD_X_TILED,
+	DRM_FORMAT_MOD_LINEAR,
+	DRM_FORMAT_MOD_INVALID
+};
+
 static const uint64_t skl_plane_format_modifiers[] = {
+	I915_FORMAT_MOD_Yf_TILED_CCS,
+	I915_FORMAT_MOD_Y_TILED_CCS,
 	I915_FORMAT_MOD_Yf_TILED,
 	I915_FORMAT_MOD_Y_TILED,
 	I915_FORMAT_MOD_X_TILED,
@@ -1148,6 +1158,9 @@  static bool skl_sprite_plane_format_mod_supported(struct drm_plane *plane,
 	case DRM_FORMAT_XBGR8888:
 	case DRM_FORMAT_ARGB8888:
 	case DRM_FORMAT_ABGR8888:
+		if (modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
+		    modifier == I915_FORMAT_MOD_Yf_TILED_CCS)
+			return true;
 	case DRM_FORMAT_RGB565:
 	case DRM_FORMAT_XRGB2101010:
 	case DRM_FORMAT_XBGR2101010:
@@ -1230,7 +1243,7 @@  intel_sprite_plane_create(struct drm_i915_private *dev_priv,
 	}
 	intel_plane->base.state = &state->base;
 
-	if (INTEL_GEN(dev_priv) >= 9) {
+	if (INTEL_GEN(dev_priv) >= 10) {
 		intel_plane->can_scale = true;
 		state->scaler_id = -1;
 
@@ -1240,6 +1253,19 @@  intel_sprite_plane_create(struct drm_i915_private *dev_priv,
 		plane_formats = skl_plane_formats;
 		num_plane_formats = ARRAY_SIZE(skl_plane_formats);
 		modifiers = skl_plane_format_modifiers;
+	} else if (INTEL_GEN(dev_priv) >= 9) {
+		intel_plane->can_scale = true;
+		state->scaler_id = -1;
+
+		intel_plane->update_plane = skl_update_plane;
+		intel_plane->disable_plane = skl_disable_plane;
+
+		plane_formats = skl_plane_formats;
+		num_plane_formats = ARRAY_SIZE(skl_plane_formats);
+		if (pipe >= PIPE_C)
+			modifiers = skl_plane_format_modifiers_noccs;
+		else
+			modifiers = skl_plane_format_modifiers;
 	} else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
 		intel_plane->can_scale = false;
 		intel_plane->max_downscale = 1;

Comments

On Tuesday, August 1, 2017 9:58:17 AM PDT Ben Widawsky wrote:
> v2:
>   - Support sprite plane.
>   - Support pipe C/D limitation on GEN9.
> 
> v3:
>   - Rename structure (Ville)
>   - Handle GLK (Ville)
> 
> v4:
>   - Fix PIPE_C check, introduced in v2 (Daniel)
>   - Whitespace fix (Daniel)
> 
> Cc: Daniel Stone <daniels@collabora.com>
> Cc: Kristian Høgsberg <krh@bitplanet.net>
> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 30 +++++++++++++++++++++++++++---
>  drivers/gpu/drm/i915/intel_sprite.c  | 28 +++++++++++++++++++++++++++-
>  2 files changed, 54 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index ad49b99ef25f..0dc9f40edc7e 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -93,7 +93,17 @@ static const uint32_t skl_primary_formats[] = {
>  	DRM_FORMAT_VYUY,
>  };
>  
> -static const uint64_t skl_format_modifiers[] = {
> +static const uint64_t skl_format_modifiers_noccs[] = {
> +	I915_FORMAT_MOD_Yf_TILED,
> +	I915_FORMAT_MOD_Y_TILED,
> +	I915_FORMAT_MOD_X_TILED,
> +	DRM_FORMAT_MOD_LINEAR,
> +	DRM_FORMAT_MOD_INVALID
> +};
> +
> +static const uint64_t skl_format_modifiers_ccs[] = {
> +	I915_FORMAT_MOD_Yf_TILED_CCS,
> +	I915_FORMAT_MOD_Y_TILED_CCS,
>  	I915_FORMAT_MOD_Yf_TILED,
>  	I915_FORMAT_MOD_Y_TILED,
>  	I915_FORMAT_MOD_X_TILED,
> @@ -13853,6 +13863,10 @@ static bool skl_mod_supported(uint32_t format, uint64_t modifier)
>  	case DRM_FORMAT_XBGR8888:
>  	case DRM_FORMAT_ARGB8888:
>  	case DRM_FORMAT_ABGR8888:
> +		if (modifier == I915_FORMAT_MOD_Yf_TILED_CCS ||
> +		    modifier == I915_FORMAT_MOD_Y_TILED_CCS)
> +			return true;
> +		/* fall through */
>  	case DRM_FORMAT_RGB565:
>  	case DRM_FORMAT_XRGB2101010:
>  	case DRM_FORMAT_XBGR2101010:
> @@ -14099,10 +14113,20 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
>  	primary->frontbuffer_bit = INTEL_FRONTBUFFER_PRIMARY(pipe);
>  	primary->check_plane = intel_check_primary_plane;
>  
> -	if (INTEL_GEN(dev_priv) >= 9) {
> +	if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) {
> +		intel_primary_formats = skl_primary_formats;
> +		num_formats = ARRAY_SIZE(skl_primary_formats);
> +		modifiers = skl_format_modifiers_ccs;
> +
> +		primary->update_plane = skylake_update_primary_plane;
> +		primary->disable_plane = skylake_disable_primary_plane;
> +	} else if (INTEL_GEN(dev_priv) >= 9) {
>  		intel_primary_formats = skl_primary_formats;
>  		num_formats = ARRAY_SIZE(skl_primary_formats);
> -		modifiers = skl_format_modifiers;
> +		if (pipe < PIPE_C)
> +			modifiers = skl_format_modifiers_ccs;
> +		else
> +			modifiers = skl_format_modifiers_noccs;
>  
>  		primary->update_plane = skylake_update_primary_plane;
>  		primary->disable_plane = skylake_disable_primary_plane;
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
> index b1cc4835b963..5a2b3f3693a6 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -1085,7 +1085,17 @@ static uint32_t skl_plane_formats[] = {
>  	DRM_FORMAT_VYUY,
>  };
>  
> +static const uint64_t skl_plane_format_modifiers_noccs[] = {
> +	I915_FORMAT_MOD_Yf_TILED,
> +	I915_FORMAT_MOD_Y_TILED,
> +	I915_FORMAT_MOD_X_TILED,
> +	DRM_FORMAT_MOD_LINEAR,
> +	DRM_FORMAT_MOD_INVALID
> +};
> +
>  static const uint64_t skl_plane_format_modifiers[] = {
> +	I915_FORMAT_MOD_Yf_TILED_CCS,
> +	I915_FORMAT_MOD_Y_TILED_CCS,
>  	I915_FORMAT_MOD_Yf_TILED,
>  	I915_FORMAT_MOD_Y_TILED,
>  	I915_FORMAT_MOD_X_TILED,
> @@ -1148,6 +1158,9 @@ static bool skl_sprite_plane_format_mod_supported(struct drm_plane *plane,
>  	case DRM_FORMAT_XBGR8888:
>  	case DRM_FORMAT_ARGB8888:
>  	case DRM_FORMAT_ABGR8888:
> +		if (modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
> +		    modifier == I915_FORMAT_MOD_Yf_TILED_CCS)
> +			return true;
>  	case DRM_FORMAT_RGB565:
>  	case DRM_FORMAT_XRGB2101010:
>  	case DRM_FORMAT_XBGR2101010:
> @@ -1230,7 +1243,7 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
>  	}
>  	intel_plane->base.state = &state->base;
>  
> -	if (INTEL_GEN(dev_priv) >= 9) {
> +	if (INTEL_GEN(dev_priv) >= 10) {

I think this should be INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv).

With that fixed, this patch would be:
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

for what it's worth (I'm not that familiar with display).

>  		intel_plane->can_scale = true;
>  		state->scaler_id = -1;
>  
> @@ -1240,6 +1253,19 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
>  		plane_formats = skl_plane_formats;
>  		num_plane_formats = ARRAY_SIZE(skl_plane_formats);
>  		modifiers = skl_plane_format_modifiers;
> +	} else if (INTEL_GEN(dev_priv) >= 9) {
> +		intel_plane->can_scale = true;
> +		state->scaler_id = -1;
> +
> +		intel_plane->update_plane = skl_update_plane;
> +		intel_plane->disable_plane = skl_disable_plane;
> +
> +		plane_formats = skl_plane_formats;
> +		num_plane_formats = ARRAY_SIZE(skl_plane_formats);
> +		if (pipe >= PIPE_C)
> +			modifiers = skl_plane_format_modifiers_noccs;
> +		else
> +			modifiers = skl_plane_format_modifiers;
>  	} else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
>  		intel_plane->can_scale = false;
>  		intel_plane->max_downscale = 1;
On 17-08-01 15:43:50, Kenneth Graunke wrote:
>On Tuesday, August 1, 2017 9:58:17 AM PDT Ben Widawsky wrote:
>> v2:
>>   - Support sprite plane.
>>   - Support pipe C/D limitation on GEN9.
>>
>> v3:
>>   - Rename structure (Ville)
>>   - Handle GLK (Ville)
>>
>> v4:
>>   - Fix PIPE_C check, introduced in v2 (Daniel)
>>   - Whitespace fix (Daniel)
>>
>> Cc: Daniel Stone <daniels@collabora.com>
>> Cc: Kristian Høgsberg <krh@bitplanet.net>
>> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
>> ---
>>  drivers/gpu/drm/i915/intel_display.c | 30 +++++++++++++++++++++++++++---
>>  drivers/gpu/drm/i915/intel_sprite.c  | 28 +++++++++++++++++++++++++++-
>>  2 files changed, 54 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>> index ad49b99ef25f..0dc9f40edc7e 100644
>> --- a/drivers/gpu/drm/i915/intel_display.c
>> +++ b/drivers/gpu/drm/i915/intel_display.c
>> @@ -93,7 +93,17 @@ static const uint32_t skl_primary_formats[] = {
>>  	DRM_FORMAT_VYUY,
>>  };
>>
>> -static const uint64_t skl_format_modifiers[] = {
>> +static const uint64_t skl_format_modifiers_noccs[] = {
>> +	I915_FORMAT_MOD_Yf_TILED,
>> +	I915_FORMAT_MOD_Y_TILED,
>> +	I915_FORMAT_MOD_X_TILED,
>> +	DRM_FORMAT_MOD_LINEAR,
>> +	DRM_FORMAT_MOD_INVALID
>> +};
>> +
>> +static const uint64_t skl_format_modifiers_ccs[] = {
>> +	I915_FORMAT_MOD_Yf_TILED_CCS,
>> +	I915_FORMAT_MOD_Y_TILED_CCS,
>>  	I915_FORMAT_MOD_Yf_TILED,
>>  	I915_FORMAT_MOD_Y_TILED,
>>  	I915_FORMAT_MOD_X_TILED,
>> @@ -13853,6 +13863,10 @@ static bool skl_mod_supported(uint32_t format, uint64_t modifier)
>>  	case DRM_FORMAT_XBGR8888:
>>  	case DRM_FORMAT_ARGB8888:
>>  	case DRM_FORMAT_ABGR8888:
>> +		if (modifier == I915_FORMAT_MOD_Yf_TILED_CCS ||
>> +		    modifier == I915_FORMAT_MOD_Y_TILED_CCS)
>> +			return true;
>> +		/* fall through */
>>  	case DRM_FORMAT_RGB565:
>>  	case DRM_FORMAT_XRGB2101010:
>>  	case DRM_FORMAT_XBGR2101010:
>> @@ -14099,10 +14113,20 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
>>  	primary->frontbuffer_bit = INTEL_FRONTBUFFER_PRIMARY(pipe);
>>  	primary->check_plane = intel_check_primary_plane;
>>
>> -	if (INTEL_GEN(dev_priv) >= 9) {
>> +	if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) {
>> +		intel_primary_formats = skl_primary_formats;
>> +		num_formats = ARRAY_SIZE(skl_primary_formats);
>> +		modifiers = skl_format_modifiers_ccs;
>> +
>> +		primary->update_plane = skylake_update_primary_plane;
>> +		primary->disable_plane = skylake_disable_primary_plane;
>> +	} else if (INTEL_GEN(dev_priv) >= 9) {
>>  		intel_primary_formats = skl_primary_formats;
>>  		num_formats = ARRAY_SIZE(skl_primary_formats);
>> -		modifiers = skl_format_modifiers;
>> +		if (pipe < PIPE_C)
>> +			modifiers = skl_format_modifiers_ccs;
>> +		else
>> +			modifiers = skl_format_modifiers_noccs;
>>
>>  		primary->update_plane = skylake_update_primary_plane;
>>  		primary->disable_plane = skylake_disable_primary_plane;
>> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
>> index b1cc4835b963..5a2b3f3693a6 100644
>> --- a/drivers/gpu/drm/i915/intel_sprite.c
>> +++ b/drivers/gpu/drm/i915/intel_sprite.c
>> @@ -1085,7 +1085,17 @@ static uint32_t skl_plane_formats[] = {
>>  	DRM_FORMAT_VYUY,
>>  };
>>
>> +static const uint64_t skl_plane_format_modifiers_noccs[] = {
>> +	I915_FORMAT_MOD_Yf_TILED,
>> +	I915_FORMAT_MOD_Y_TILED,
>> +	I915_FORMAT_MOD_X_TILED,
>> +	DRM_FORMAT_MOD_LINEAR,
>> +	DRM_FORMAT_MOD_INVALID
>> +};
>> +
>>  static const uint64_t skl_plane_format_modifiers[] = {
>> +	I915_FORMAT_MOD_Yf_TILED_CCS,
>> +	I915_FORMAT_MOD_Y_TILED_CCS,
>>  	I915_FORMAT_MOD_Yf_TILED,
>>  	I915_FORMAT_MOD_Y_TILED,
>>  	I915_FORMAT_MOD_X_TILED,
>> @@ -1148,6 +1158,9 @@ static bool skl_sprite_plane_format_mod_supported(struct drm_plane *plane,
>>  	case DRM_FORMAT_XBGR8888:
>>  	case DRM_FORMAT_ARGB8888:
>>  	case DRM_FORMAT_ABGR8888:
>> +		if (modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
>> +		    modifier == I915_FORMAT_MOD_Yf_TILED_CCS)
>> +			return true;
>>  	case DRM_FORMAT_RGB565:
>>  	case DRM_FORMAT_XRGB2101010:
>>  	case DRM_FORMAT_XBGR2101010:
>> @@ -1230,7 +1243,7 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
>>  	}
>>  	intel_plane->base.state = &state->base;
>>
>> -	if (INTEL_GEN(dev_priv) >= 9) {
>> +	if (INTEL_GEN(dev_priv) >= 10) {
>
>I think this should be INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv).
>
>With that fixed, this patch would be:
>Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
>
>for what it's worth (I'm not that familiar with display).
>

Thanks. Here is what I've changed locally which didn't match the primary
support:


>>  		intel_plane->can_scale = true;
>>  		state->scaler_id = -1;
>>
>> @@ -1240,6 +1253,19 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
>>  		plane_formats = skl_plane_formats;
>>  		num_plane_formats = ARRAY_SIZE(skl_plane_formats);
>>  		modifiers = skl_plane_format_modifiers;
>> +	} else if (INTEL_GEN(dev_priv) >= 9) {
>> +		intel_plane->can_scale = true;
>> +		state->scaler_id = -1;
>> +
>> +		intel_plane->update_plane = skl_update_plane;
>> +		intel_plane->disable_plane = skl_disable_plane;
>> +
>> +		plane_formats = skl_plane_formats;
>> +		num_plane_formats = ARRAY_SIZE(skl_plane_formats);
>> +		if (pipe >= PIPE_C)
>> +			modifiers = skl_plane_format_modifiers_noccs;
>> +		else
>> +			modifiers = skl_plane_format_modifiers;
>>  	} else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
>>  		intel_plane->can_scale = false;
>>  		intel_plane->max_downscale = 1;
On Tuesday, August 1, 2017 3:47:53 PM PDT Ben Widawsky wrote:
> On 17-08-01 15:43:50, Kenneth Graunke wrote:
> >On Tuesday, August 1, 2017 9:58:17 AM PDT Ben Widawsky wrote:
> >> v2:
> >>   - Support sprite plane.
> >>   - Support pipe C/D limitation on GEN9.
> >>
> >> v3:
> >>   - Rename structure (Ville)
> >>   - Handle GLK (Ville)
> >>
> >> v4:
> >>   - Fix PIPE_C check, introduced in v2 (Daniel)
> >>   - Whitespace fix (Daniel)
> >>
> >> Cc: Daniel Stone <daniels@collabora.com>
> >> Cc: Kristian Høgsberg <krh@bitplanet.net>
> >> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> >> ---
> >>  drivers/gpu/drm/i915/intel_display.c | 30 +++++++++++++++++++++++++++---
> >>  drivers/gpu/drm/i915/intel_sprite.c  | 28 +++++++++++++++++++++++++++-
> >>  2 files changed, 54 insertions(+), 4 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> >> index ad49b99ef25f..0dc9f40edc7e 100644
> >> --- a/drivers/gpu/drm/i915/intel_display.c
> >> +++ b/drivers/gpu/drm/i915/intel_display.c
> >> @@ -93,7 +93,17 @@ static const uint32_t skl_primary_formats[] = {
> >>  	DRM_FORMAT_VYUY,
> >>  };
> >>
> >> -static const uint64_t skl_format_modifiers[] = {
> >> +static const uint64_t skl_format_modifiers_noccs[] = {
> >> +	I915_FORMAT_MOD_Yf_TILED,
> >> +	I915_FORMAT_MOD_Y_TILED,
> >> +	I915_FORMAT_MOD_X_TILED,
> >> +	DRM_FORMAT_MOD_LINEAR,
> >> +	DRM_FORMAT_MOD_INVALID
> >> +};
> >> +
> >> +static const uint64_t skl_format_modifiers_ccs[] = {
> >> +	I915_FORMAT_MOD_Yf_TILED_CCS,
> >> +	I915_FORMAT_MOD_Y_TILED_CCS,
> >>  	I915_FORMAT_MOD_Yf_TILED,
> >>  	I915_FORMAT_MOD_Y_TILED,
> >>  	I915_FORMAT_MOD_X_TILED,
> >> @@ -13853,6 +13863,10 @@ static bool skl_mod_supported(uint32_t format, uint64_t modifier)
> >>  	case DRM_FORMAT_XBGR8888:
> >>  	case DRM_FORMAT_ARGB8888:
> >>  	case DRM_FORMAT_ABGR8888:
> >> +		if (modifier == I915_FORMAT_MOD_Yf_TILED_CCS ||
> >> +		    modifier == I915_FORMAT_MOD_Y_TILED_CCS)
> >> +			return true;
> >> +		/* fall through */
> >>  	case DRM_FORMAT_RGB565:
> >>  	case DRM_FORMAT_XRGB2101010:
> >>  	case DRM_FORMAT_XBGR2101010:
> >> @@ -14099,10 +14113,20 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
> >>  	primary->frontbuffer_bit = INTEL_FRONTBUFFER_PRIMARY(pipe);
> >>  	primary->check_plane = intel_check_primary_plane;
> >>
> >> -	if (INTEL_GEN(dev_priv) >= 9) {
> >> +	if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) {
> >> +		intel_primary_formats = skl_primary_formats;
> >> +		num_formats = ARRAY_SIZE(skl_primary_formats);
> >> +		modifiers = skl_format_modifiers_ccs;
> >> +
> >> +		primary->update_plane = skylake_update_primary_plane;
> >> +		primary->disable_plane = skylake_disable_primary_plane;
> >> +	} else if (INTEL_GEN(dev_priv) >= 9) {
> >>  		intel_primary_formats = skl_primary_formats;
> >>  		num_formats = ARRAY_SIZE(skl_primary_formats);
> >> -		modifiers = skl_format_modifiers;
> >> +		if (pipe < PIPE_C)
> >> +			modifiers = skl_format_modifiers_ccs;
> >> +		else
> >> +			modifiers = skl_format_modifiers_noccs;
> >>
> >>  		primary->update_plane = skylake_update_primary_plane;
> >>  		primary->disable_plane = skylake_disable_primary_plane;
> >> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
> >> index b1cc4835b963..5a2b3f3693a6 100644
> >> --- a/drivers/gpu/drm/i915/intel_sprite.c
> >> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> >> @@ -1085,7 +1085,17 @@ static uint32_t skl_plane_formats[] = {
> >>  	DRM_FORMAT_VYUY,
> >>  };
> >>
> >> +static const uint64_t skl_plane_format_modifiers_noccs[] = {
> >> +	I915_FORMAT_MOD_Yf_TILED,
> >> +	I915_FORMAT_MOD_Y_TILED,
> >> +	I915_FORMAT_MOD_X_TILED,
> >> +	DRM_FORMAT_MOD_LINEAR,
> >> +	DRM_FORMAT_MOD_INVALID
> >> +};
> >> +
> >>  static const uint64_t skl_plane_format_modifiers[] = {
> >> +	I915_FORMAT_MOD_Yf_TILED_CCS,
> >> +	I915_FORMAT_MOD_Y_TILED_CCS,
> >>  	I915_FORMAT_MOD_Yf_TILED,
> >>  	I915_FORMAT_MOD_Y_TILED,
> >>  	I915_FORMAT_MOD_X_TILED,
> >> @@ -1148,6 +1158,9 @@ static bool skl_sprite_plane_format_mod_supported(struct drm_plane *plane,
> >>  	case DRM_FORMAT_XBGR8888:
> >>  	case DRM_FORMAT_ARGB8888:
> >>  	case DRM_FORMAT_ABGR8888:
> >> +		if (modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
> >> +		    modifier == I915_FORMAT_MOD_Yf_TILED_CCS)
> >> +			return true;
> >>  	case DRM_FORMAT_RGB565:
> >>  	case DRM_FORMAT_XRGB2101010:
> >>  	case DRM_FORMAT_XBGR2101010:
> >> @@ -1230,7 +1243,7 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
> >>  	}
> >>  	intel_plane->base.state = &state->base;
> >>
> >> -	if (INTEL_GEN(dev_priv) >= 9) {
> >> +	if (INTEL_GEN(dev_priv) >= 10) {
> >
> >I think this should be INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv).
> >
> >With that fixed, this patch would be:
> >Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
> >
> >for what it's worth (I'm not that familiar with display).
> >
> 
> Thanks. Here is what I've changed locally which didn't match the primary
> support:
> 
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
> index 5a2b3f3693a6..1c484195fd0f 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -1093,7 +1093,7 @@ static const uint64_t skl_plane_format_modifiers_noccs[] = {
>         DRM_FORMAT_MOD_INVALID
>  };
>  
> -static const uint64_t skl_plane_format_modifiers[] = {
> +static const uint64_t skl_plane_format_modifiers_ccs[] = {
>         I915_FORMAT_MOD_Yf_TILED_CCS,
>         I915_FORMAT_MOD_Y_TILED_CCS,
>         I915_FORMAT_MOD_Yf_TILED,
> @@ -1243,7 +1243,7 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
>         }
>         intel_plane->base.state = &state->base;
>  
> -       if (INTEL_GEN(dev_priv) >= 10) {
> +       if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) {
>                 intel_plane->can_scale = true;
>                 state->scaler_id = -1;
>  
> @@ -1252,7 +1252,7 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
>  
>                 plane_formats = skl_plane_formats;
>                 num_plane_formats = ARRAY_SIZE(skl_plane_formats);
> -               modifiers = skl_plane_format_modifiers;
> +               modifiers = skl_plane_format_modifiers_ccs;
>         } else if (INTEL_GEN(dev_priv) >= 9) {
>                 intel_plane->can_scale = true;
>                 state->scaler_id = -1;
> @@ -1262,10 +1262,10 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
>  
>                 plane_formats = skl_plane_formats;
>                 num_plane_formats = ARRAY_SIZE(skl_plane_formats);
> -               if (pipe >= PIPE_C)
> -                       modifiers = skl_plane_format_modifiers_noccs;
> +               if (pipe < PIPE_C)
> +                       modifiers = skl_plane_format_modifiers_ccs;
>                 else
> -                       modifiers = skl_plane_format_modifiers;
> +                       modifiers = skl_plane_format_modifiers_noccs;
>         } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
>                 intel_plane->can_scale = false;

That looks good, with that squashed in,
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Hi,

On 1 August 2017 at 17:58, Ben Widawsky <ben@bwidawsk.net> wrote:
> @@ -1240,6 +1253,19 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
>                 plane_formats = skl_plane_formats;
>                 num_plane_formats = ARRAY_SIZE(skl_plane_formats);
>                 modifiers = skl_plane_format_modifiers;
> +       } else if (INTEL_GEN(dev_priv) >= 9) {
> +               intel_plane->can_scale = true;
> +               state->scaler_id = -1;
> +
> +               intel_plane->update_plane = skl_update_plane;
> +               intel_plane->disable_plane = skl_disable_plane;
> +
> +               plane_formats = skl_plane_formats;
> +               num_plane_formats = ARRAY_SIZE(skl_plane_formats);
> +               if (pipe >= PIPE_C)


if (pipe >= PIPE_C || plane >= PLANE_SPRITE1)

cf. skl_check_ccs_aux_surface() which rejects CCS on anything other
than PRIMARY/SPRITE0.

I'll squash when pushing.

Cheers,
Daniel
On 17-08-03 12:00:56, Daniel Stone wrote:
>Hi,
>
>On 1 August 2017 at 17:58, Ben Widawsky <ben@bwidawsk.net> wrote:
>> @@ -1240,6 +1253,19 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
>>                 plane_formats = skl_plane_formats;
>>                 num_plane_formats = ARRAY_SIZE(skl_plane_formats);
>>                 modifiers = skl_plane_format_modifiers;
>> +       } else if (INTEL_GEN(dev_priv) >= 9) {
>> +               intel_plane->can_scale = true;
>> +               state->scaler_id = -1;
>> +
>> +               intel_plane->update_plane = skl_update_plane;
>> +               intel_plane->disable_plane = skl_disable_plane;
>> +
>> +               plane_formats = skl_plane_formats;
>> +               num_plane_formats = ARRAY_SIZE(skl_plane_formats);
>> +               if (pipe >= PIPE_C)
>
>
>if (pipe >= PIPE_C || plane >= PLANE_SPRITE1)
>
>cf. skl_check_ccs_aux_surface() which rejects CCS on anything other
>than PRIMARY/SPRITE0.
>
>I'll squash when pushing.
>
>Cheers,
>Daniel

Okay, thanks. With universal planes however, I don't think we need such a
restriction, but whatevs
On 3 August 2017 at 18:21, Ben Widawsky <ben@bwidawsk.net> wrote:
> On 17-08-03 12:00:56, Daniel Stone wrote:
>> if (pipe >= PIPE_C || plane >= PLANE_SPRITE1)
>>
>> cf. skl_check_ccs_aux_surface() which rejects CCS on anything other
>> than PRIMARY/SPRITE0.
>>
>> I'll squash when pushing.
>
> Okay, thanks. With universal planes however, I don't think we need such a
> restriction, but whatevs

Speak to Ville about it, I guess? The atomic check path has this check:
        switch (plane->id) {
        case PLANE_PRIMARY:
        case PLANE_SPRITE0:
                break;
        default:
                DRM_DEBUG_KMS("RC support only on plane 1 and 2\n");
                return -EINVAL;
        }

so if we advertised it on SPRITE1/2 we'd be telling userspace to try a
configuration which could never work ...

Cheers,
Daniel
Hi,

On 3 August 2017 at 12:00, Daniel Stone <daniel@fooishbar.org> wrote:
> On 1 August 2017 at 17:58, Ben Widawsky <ben@bwidawsk.net> wrote:
>> @@ -1240,6 +1253,19 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
>>                 plane_formats = skl_plane_formats;
>>                 num_plane_formats = ARRAY_SIZE(skl_plane_formats);
>>                 modifiers = skl_plane_format_modifiers;
>> +       } else if (INTEL_GEN(dev_priv) >= 9) {
>> +               intel_plane->can_scale = true;
>> +               state->scaler_id = -1;
>> +
>> +               intel_plane->update_plane = skl_update_plane;
>> +               intel_plane->disable_plane = skl_disable_plane;
>> +
>> +               plane_formats = skl_plane_formats;
>> +               num_plane_formats = ARRAY_SIZE(skl_plane_formats);
>> +               if (pipe >= PIPE_C)
>
>
> if (pipe >= PIPE_C || plane >= PLANE_SPRITE1)
>
> cf. skl_check_ccs_aux_surface() which rejects CCS on anything other
> than PRIMARY/SPRITE0.

Turns out that should be 1 rather than PLANE_SPRITE1.

Anyway, I've pulled out CCS modifiers for all sprite planes in this
series. Whilst actually testing it, I discovered DDB allocations were
hopelessly broken.

Starting with a 1920x1080 primary plane which had (at some point) had
a CCS surface on it, and moving to a 1920x1080 _linear_ primary plane
with a 256x256 CCS sprite plane, I ended up with a DDB split of 443
primary / 32 plane. Y-tiling needs 33 blocks for even 256x256, so it
didn't work.

Given that, I've removed advertisement of Y, Yf, Y_CCS and Y_CCS, in
order to not give userspace false hope. Once DDB allocation is fixed,
we can start advertising these modifiers.

Cheers,
Daniel