[17/18] drm/i915/cnl: LSPCON support is gen9+

Submitted by Rodrigo Vivi on June 9, 2017, 10:26 p.m.

Details

Message ID 1497047175-27250-17-git-send-email-rodrigo.vivi@intel.com
State New
Headers show
Series "Series without cover letter" ( rev: 1 ) in Intel GFX

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Commit Message

Rodrigo Vivi June 9, 2017, 10:26 p.m. 
There is no platform specific change needed for LSPCON
support on Cannonlake. So let's make it gen9+.

Cc: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Shashank Sharma <shashank.sharma@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

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diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 602fb33..3866b2e 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3003,7 +3003,7 @@  static inline struct scatterlist *__sg_next(struct scatterlist *sg)
 
 #define HAS_GMCH_DISPLAY(dev_priv) ((dev_priv)->info.has_gmch_display)
 
-#define HAS_LSPCON(dev_priv) (IS_GEN9(dev_priv))
+#define HAS_LSPCON(dev_priv) (INTEL_GEN(dev_priv) >= 9)
 
 /* DPF == dynamic parity feature */
 #define HAS_L3_DPF(dev_priv) ((dev_priv)->info.has_l3_dpf)