drm/amdgpu: enable gfx 9.0 cp interrupts

Submitted by Qingqing.Wang@amd.com on June 1, 2017, 3:10 a.m.

Details

Message ID 1496286613-14104-1-git-send-email-Qingqing.Wang@amd.com
State New
Headers show
Series "drm/amdgpu: enable gfx 9.0 cp interrupts" ( rev: 1 ) in AMD X.Org drivers

Not browsing as part of any series.

Commit Message

Qingqing.Wang@amd.com June 1, 2017, 3:10 a.m.
Change-Id: If7dee7bd1074eac7faa6af724a7272f9ce6f3a98
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 3 ---
 1 file changed, 3 deletions(-)

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diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index de35de2..68a0d40 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -1393,9 +1393,6 @@  static void gfx_v9_0_enable_gui_idle_interrupt(struct amdgpu_device *adev,
 {
 	u32 tmp = RREG32_SOC15(GC, 0, mmCP_INT_CNTL_RING0);
 
-	if (enable)
-		return;
-
 	tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CNTX_BUSY_INT_ENABLE, enable ? 1 : 0);
 	tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CNTX_EMPTY_INT_ENABLE, enable ? 1 : 0);
 	tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CMP_BUSY_INT_ENABLE, enable ? 1 : 0);

Comments

On Wed, May 31, 2017 at 11:10 PM, Ken Wang <Qingqing.Wang@amd.com> wrote:
> Change-Id: If7dee7bd1074eac7faa6af724a7272f9ce6f3a98
> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 3 ---
>  1 file changed, 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index de35de2..68a0d40 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -1393,9 +1393,6 @@ static void gfx_v9_0_enable_gui_idle_interrupt(struct amdgpu_device *adev,
>  {
>         u32 tmp = RREG32_SOC15(GC, 0, mmCP_INT_CNTL_RING0);
>
> -       if (enable)
> -               return;
> -
>         tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CNTX_BUSY_INT_ENABLE, enable ? 1 : 0);
>         tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CNTX_EMPTY_INT_ENABLE, enable ? 1 : 0);
>         tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CMP_BUSY_INT_ENABLE, enable ? 1 : 0);
> --
> 2.7.4
>
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