drm/amdgpu: show gfx clock gating status to user

Submitted by Huang, Ray on Jan. 3, 2017, 10:47 a.m.

Details

Message ID 1483440426-22080-1-git-send-email-ray.huang@amd.com
State New
Headers show
Series "drm/amdgpu: show gfx clock gating status to user" ( rev: 1 ) in AMD X.Org drivers

Not browsing as part of any series.

Commit Message

Huang, Ray Jan. 3, 2017, 10:47 a.m.
Signed-off-by: Huang Rui <ray.huang@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h    | 1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 5 +++++
 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c  | 2 ++
 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c  | 2 ++
 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c  | 3 +++
 5 files changed, 13 insertions(+)

Patch hide | download patch | download mbox

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 96eeea7..989d311 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1033,6 +1033,7 @@  struct amdgpu_gfx {
 	struct amdgpu_irq_src		priv_inst_irq;
 	/* gfx status */
 	uint32_t			gfx_current_status;
+	bool				cg_enabled;
 	/* ce ram size*/
 	unsigned			ce_ram_size;
 	struct amdgpu_cu_info		cu_info;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
index a7c7657..10f2eab 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
@@ -1543,6 +1543,11 @@  static int amdgpu_debugfs_pm_info(struct seq_file *m, void *data)
 	struct amdgpu_device *adev = dev->dev_private;
 	struct drm_device *ddev = adev->ddev;
 
+	if (adev->gfx.cg_enabled)
+		seq_printf(m, "GFX Clock Gating: Enabled\n");
+	else
+		seq_printf(m, "GFX Clock Gating: Disabled\n");
+
 	if (!adev->pm.dpm_enabled) {
 		seq_printf(m, "dpm not enabled\n");
 		return 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
index 45b3365..c59fac2 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
@@ -3178,6 +3178,8 @@  static int gfx_v6_0_set_clockgating_state(void *handle,
 	}
 	gfx_v6_0_enable_gui_idle_interrupt(adev, true);
 
+	adev->gfx.cg_enabled = (state == AMD_CG_STATE_GATE) ? true : false;
+
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
index 0efb912..eb2ed44 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
@@ -5108,6 +5108,8 @@  static int gfx_v7_0_set_clockgating_state(void *handle,
 	}
 	gfx_v7_0_enable_gui_idle_interrupt(adev, true);
 
+	adev->gfx.cg_enabled = (state == AMD_CG_STATE_GATE) ? true : false;
+
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index c4afa8e..2b9618d 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -6156,6 +6156,9 @@  static int gfx_v8_0_set_clockgating_state(void *handle,
 	default:
 		break;
 	}
+
+	adev->gfx.cg_enabled = (state == AMD_CG_STATE_GATE) ? true : false;
+
 	return 0;
 }
 

Comments

> -----Original Message-----
> From: Huang Rui [mailto:ray.huang@amd.com]
> Sent: Tuesday, January 03, 2017 5:47 AM
> To: Deucher, Alexander; amd-gfx@lists.freedesktop.org
> Cc: Zhu, Rex; Mao, David; Fu, Ping; Huang, Ray
> Subject: [PATCH] drm/amdgpu: show gfx clock gating status to user
> 
> Signed-off-by: Huang Rui <ray.huang@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu.h    | 1 +
>  drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 5 +++++
>  drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c  | 2 ++
>  drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c  | 2 ++
>  drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c  | 3 +++
>  5 files changed, 13 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 96eeea7..989d311 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -1033,6 +1033,7 @@ struct amdgpu_gfx {
>  	struct amdgpu_irq_src		priv_inst_irq;
>  	/* gfx status */
>  	uint32_t			gfx_current_status;
> +	bool				cg_enabled;
>  	/* ce ram size*/
>  	unsigned			ce_ram_size;
>  	struct amdgpu_cu_info		cu_info;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
> index a7c7657..10f2eab 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
> @@ -1543,6 +1543,11 @@ static int amdgpu_debugfs_pm_info(struct
> seq_file *m, void *data)
>  	struct amdgpu_device *adev = dev->dev_private;
>  	struct drm_device *ddev = adev->ddev;
> 
> +	if (adev->gfx.cg_enabled)
> +		seq_printf(m, "GFX Clock Gating: Enabled\n");
> +	else
> +		seq_printf(m, "GFX Clock Gating: Disabled\n");
> +


I think it would be better to print the cg_flags and pg_flags (both as a mask and in human readable form) so we know exactly cg and pg features are enabled.

Alex

>  	if (!adev->pm.dpm_enabled) {
>  		seq_printf(m, "dpm not enabled\n");
>  		return 0;
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
> index 45b3365..c59fac2 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
> @@ -3178,6 +3178,8 @@ static int gfx_v6_0_set_clockgating_state(void
> *handle,
>  	}
>  	gfx_v6_0_enable_gui_idle_interrupt(adev, true);
> 
> +	adev->gfx.cg_enabled = (state == AMD_CG_STATE_GATE) ? true :
> false;
> +
>  	return 0;
>  }
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> index 0efb912..eb2ed44 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> @@ -5108,6 +5108,8 @@ static int gfx_v7_0_set_clockgating_state(void
> *handle,
>  	}
>  	gfx_v7_0_enable_gui_idle_interrupt(adev, true);
> 
> +	adev->gfx.cg_enabled = (state == AMD_CG_STATE_GATE) ? true :
> false;
> +
>  	return 0;
>  }
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> index c4afa8e..2b9618d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> @@ -6156,6 +6156,9 @@ static int gfx_v8_0_set_clockgating_state(void
> *handle,
>  	default:
>  		break;
>  	}
> +
> +	adev->gfx.cg_enabled = (state == AMD_CG_STATE_GATE) ? true :
> false;
> +
>  	return 0;
>  }
> 
> --
> 2.7.4
On Tue, Jan 03, 2017 at 11:02:09PM +0800, Deucher, Alexander wrote:
> > -----Original Message-----
> > From: Huang Rui [mailto:ray.huang@amd.com]
> > Sent: Tuesday, January 03, 2017 5:47 AM
> > To: Deucher, Alexander; amd-gfx@lists.freedesktop.org
> > Cc: Zhu, Rex; Mao, David; Fu, Ping; Huang, Ray
> > Subject: [PATCH] drm/amdgpu: show gfx clock gating status to user
> > 
> > Signed-off-by: Huang Rui <ray.huang@amd.com>
> > ---
> >  drivers/gpu/drm/amd/amdgpu/amdgpu.h    | 1 +
> >  drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 5 +++++
> >  drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c  | 2 ++
> >  drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c  | 2 ++
> >  drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c  | 3 +++
> >  5 files changed, 13 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> > b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> > index 96eeea7..989d311 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> > @@ -1033,6 +1033,7 @@ struct amdgpu_gfx {
> >  	struct amdgpu_irq_src		priv_inst_irq;
> >  	/* gfx status */
> >  	uint32_t			gfx_current_status;
> > +	bool				cg_enabled;
> >  	/* ce ram size*/
> >  	unsigned			ce_ram_size;
> >  	struct amdgpu_cu_info		cu_info;
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
> > b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
> > index a7c7657..10f2eab 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
> > @@ -1543,6 +1543,11 @@ static int amdgpu_debugfs_pm_info(struct
> > seq_file *m, void *data)
> >  	struct amdgpu_device *adev = dev->dev_private;
> >  	struct drm_device *ddev = adev->ddev;
> > 
> > +	if (adev->gfx.cg_enabled)
> > +		seq_printf(m, "GFX Clock Gating: Enabled\n");
> > +	else
> > +		seq_printf(m, "GFX Clock Gating: Disabled\n");
> > +
> 
> 
> I think it would be better to print the cg_flags and pg_flags (both as a mask and in human readable form) so we know exactly cg and pg features are enabled.
> 

It's probable better. Let me revise this patch and send it later.

Thanks,
Rui
On Wed, Jan 04, 2017 at 10:21:44AM +0800, Huang Rui wrote:
> On Tue, Jan 03, 2017 at 11:02:09PM +0800, Deucher, Alexander wrote:
> > > -----Original Message-----
> > > From: Huang Rui [mailto:ray.huang@amd.com]
> > > Sent: Tuesday, January 03, 2017 5:47 AM
> > > To: Deucher, Alexander; amd-gfx@lists.freedesktop.org
> > > Cc: Zhu, Rex; Mao, David; Fu, Ping; Huang, Ray
> > > Subject: [PATCH] drm/amdgpu: show gfx clock gating status to user
> > > 
> > > Signed-off-by: Huang Rui <ray.huang@amd.com>
> > > ---
> > >  drivers/gpu/drm/amd/amdgpu/amdgpu.h    | 1 +
> > >  drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 5 +++++
> > >  drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c  | 2 ++
> > >  drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c  | 2 ++
> > >  drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c  | 3 +++
> > >  5 files changed, 13 insertions(+)
> > > 
> > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> > > b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> > > index 96eeea7..989d311 100644
> > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> > > @@ -1033,6 +1033,7 @@ struct amdgpu_gfx {
> > >  	struct amdgpu_irq_src		priv_inst_irq;
> > >  	/* gfx status */
> > >  	uint32_t			gfx_current_status;
> > > +	bool				cg_enabled;
> > >  	/* ce ram size*/
> > >  	unsigned			ce_ram_size;
> > >  	struct amdgpu_cu_info		cu_info;
> > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
> > > b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
> > > index a7c7657..10f2eab 100644
> > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
> > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
> > > @@ -1543,6 +1543,11 @@ static int amdgpu_debugfs_pm_info(struct
> > > seq_file *m, void *data)
> > >  	struct amdgpu_device *adev = dev->dev_private;
> > >  	struct drm_device *ddev = adev->ddev;
> > > 
> > > +	if (adev->gfx.cg_enabled)
> > > +		seq_printf(m, "GFX Clock Gating: Enabled\n");
> > > +	else
> > > +		seq_printf(m, "GFX Clock Gating: Disabled\n");
> > > +
> > 
> > 
> > I think it would be better to print the cg_flags and pg_flags (both as a mask and in human readable form) so we know exactly cg and pg features are enabled.
> > 
> 
> It's probable better. Let me revise this patch and send it later.
> 

Hi Alex,

There is one issue on tonga, polaris10, and polaris11, they use smu to
control clock gating. And flags are below, not use adev->cg_flags. It
cannot indicate clock gating status from adev->cg_flags and the
cg_flags/pg_flags is marked supported state by HW, not runtime enablement state:

#define PP_STATE_CG             0x01
#define PP_STATE_LS             0x02
#define PP_STATE_DS             0x04
#define PP_STATE_SD             0x08
#define PP_STATE_SUPPORT_CG     0x10
#define PP_STATE_SUPPORT_LS     0x20
#define PP_STATE_SUPPORT_DS     0x40
#define PP_STATE_SUPPORT_SD     0x80

I think shall we combine them with AMD_CG_SUPPORT_GFX_MGCG and etc.?
Try to find unified flags to control clock gating and power gating...

Thanks,
Rui
On Wed, Jan 4, 2017 at 1:52 AM, Huang Rui <ray.huang@amd.com> wrote:
> On Wed, Jan 04, 2017 at 10:21:44AM +0800, Huang Rui wrote:
>> On Tue, Jan 03, 2017 at 11:02:09PM +0800, Deucher, Alexander wrote:
>> > > -----Original Message-----
>> > > From: Huang Rui [mailto:ray.huang@amd.com]
>> > > Sent: Tuesday, January 03, 2017 5:47 AM
>> > > To: Deucher, Alexander; amd-gfx@lists.freedesktop.org
>> > > Cc: Zhu, Rex; Mao, David; Fu, Ping; Huang, Ray
>> > > Subject: [PATCH] drm/amdgpu: show gfx clock gating status to user
>> > >
>> > > Signed-off-by: Huang Rui <ray.huang@amd.com>
>> > > ---
>> > >  drivers/gpu/drm/amd/amdgpu/amdgpu.h    | 1 +
>> > >  drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 5 +++++
>> > >  drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c  | 2 ++
>> > >  drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c  | 2 ++
>> > >  drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c  | 3 +++
>> > >  5 files changed, 13 insertions(+)
>> > >
>> > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>> > > b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>> > > index 96eeea7..989d311 100644
>> > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>> > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>> > > @@ -1033,6 +1033,7 @@ struct amdgpu_gfx {
>> > >   struct amdgpu_irq_src           priv_inst_irq;
>> > >   /* gfx status */
>> > >   uint32_t                        gfx_current_status;
>> > > + bool                            cg_enabled;
>> > >   /* ce ram size*/
>> > >   unsigned                        ce_ram_size;
>> > >   struct amdgpu_cu_info           cu_info;
>> > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
>> > > b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
>> > > index a7c7657..10f2eab 100644
>> > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
>> > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
>> > > @@ -1543,6 +1543,11 @@ static int amdgpu_debugfs_pm_info(struct
>> > > seq_file *m, void *data)
>> > >   struct amdgpu_device *adev = dev->dev_private;
>> > >   struct drm_device *ddev = adev->ddev;
>> > >
>> > > + if (adev->gfx.cg_enabled)
>> > > +         seq_printf(m, "GFX Clock Gating: Enabled\n");
>> > > + else
>> > > +         seq_printf(m, "GFX Clock Gating: Disabled\n");
>> > > +
>> >
>> >
>> > I think it would be better to print the cg_flags and pg_flags (both as a mask and in human readable form) so we know exactly cg and pg features are enabled.
>> >
>>
>> It's probable better. Let me revise this patch and send it later.
>>
>
> Hi Alex,
>
> There is one issue on tonga, polaris10, and polaris11, they use smu to
> control clock gating. And flags are below, not use adev->cg_flags. It
> cannot indicate clock gating status from adev->cg_flags and the
> cg_flags/pg_flags is marked supported state by HW, not runtime enablement state:
>
> #define PP_STATE_CG             0x01
> #define PP_STATE_LS             0x02
> #define PP_STATE_DS             0x04
> #define PP_STATE_SD             0x08
> #define PP_STATE_SUPPORT_CG     0x10
> #define PP_STATE_SUPPORT_LS     0x20
> #define PP_STATE_SUPPORT_DS     0x40
> #define PP_STATE_SUPPORT_SD     0x80
>
> I think shall we combine them with AMD_CG_SUPPORT_GFX_MGCG and etc.?
> Try to find unified flags to control clock gating and power gating...

I think we can still stick to the cg_flags.  The smu cg control
messages are derived from the cg_flags, they are just more coarse
grained.  cg_flags indicated the supported state, but unless there is
a problem, the driver will attempt to enable all of the features set
in cg_flags so we can use cg_flags for enablement as well.  For
tracking purposes, just add adev->cg_enabled and pg_enabled and set
the bits in the clockgating and powergating IP functions based on the
current state.  While some blocks are static, GFX supports automatic
clockgating so it's unless you've specifically disabled it, it's
enabled dynamically.  If you really want the current status, you'll
need to read the gfx cg status registers to check the current clock
state.

Alex
As talked with David. They not only need to know whether the CG/PG is supported, but also need to 
know current CG/PG state. 

we added the profile mode, so in runtime, user can disable/enable cg. 
Then user wanted to confirm current cg state.

So we may need to export cg/pg mask and current cg/pg state.

Best Regards
Rex


-----Original Message-----
From: Huang Rui [mailto:ray.huang@amd.com] 
Sent: Wednesday, January 04, 2017 10:22 AM
To: Deucher, Alexander
Cc: amd-gfx@lists.freedesktop.org; Zhu, Rex; Mao, David; Fu, Ping
Subject: Re: [PATCH] drm/amdgpu: show gfx clock gating status to user

On Tue, Jan 03, 2017 at 11:02:09PM +0800, Deucher, Alexander wrote:
> > -----Original Message-----
> > From: Huang Rui [mailto:ray.huang@amd.com]
> > Sent: Tuesday, January 03, 2017 5:47 AM
> > To: Deucher, Alexander; amd-gfx@lists.freedesktop.org
> > Cc: Zhu, Rex; Mao, David; Fu, Ping; Huang, Ray
> > Subject: [PATCH] drm/amdgpu: show gfx clock gating status to user
> > 
> > Signed-off-by: Huang Rui <ray.huang@amd.com>
> > ---
> >  drivers/gpu/drm/amd/amdgpu/amdgpu.h    | 1 +
> >  drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 5 +++++  
> > drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c  | 2 ++  
> > drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c  | 2 ++  
> > drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c  | 3 +++
> >  5 files changed, 13 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> > b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> > index 96eeea7..989d311 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> > @@ -1033,6 +1033,7 @@ struct amdgpu_gfx {
> >  	struct amdgpu_irq_src		priv_inst_irq;
> >  	/* gfx status */
> >  	uint32_t			gfx_current_status;
> > +	bool				cg_enabled;
> >  	/* ce ram size*/
> >  	unsigned			ce_ram_size;
> >  	struct amdgpu_cu_info		cu_info;
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
> > b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
> > index a7c7657..10f2eab 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
> > @@ -1543,6 +1543,11 @@ static int amdgpu_debugfs_pm_info(struct 
> > seq_file *m, void *data)
> >  	struct amdgpu_device *adev = dev->dev_private;
> >  	struct drm_device *ddev = adev->ddev;
> > 
> > +	if (adev->gfx.cg_enabled)
> > +		seq_printf(m, "GFX Clock Gating: Enabled\n");
> > +	else
> > +		seq_printf(m, "GFX Clock Gating: Disabled\n");
> > +
> 
> 
> I think it would be better to print the cg_flags and pg_flags (both as a mask and in human readable form) so we know exactly cg and pg features are enabled.
> 

It's probable better. Let me revise this patch and send it later.

Thanks,
Rui
Sorry, update.

User just need to know the cg/pg feature's state(enable/disable), not current CG state.



Best Regards

Rex



-----Original Message-----
From: Zhu, Rex
Sent: Thursday, January 05, 2017 11:34 AM
To: Huang, Ray; Deucher, Alexander
Cc: amd-gfx@lists.freedesktop.org; Mao, David; Fu, Ping
Subject: RE: [PATCH] drm/amdgpu: show gfx clock gating status to user



As talked with David. They not only need to know whether the CG/PG is supported, but also need to know  those features state(enabled/disabled) (not current CG/PG state).



we added the profile mode, so in runtime, user can disable/enable cg.

Then user wanted to confirm the feature's state



So we may need to export cg/pg mask and feature's state.



Best Regards

Rex





-----Original Message-----

From: Huang Rui [mailto:ray.huang@amd.com]

Sent: Wednesday, January 04, 2017 10:22 AM

To: Deucher, Alexander

Cc: amd-gfx@lists.freedesktop.org<mailto:amd-gfx@lists.freedesktop.org>; Zhu, Rex; Mao, David; Fu, Ping

Subject: Re: [PATCH] drm/amdgpu: show gfx clock gating status to user



On Tue, Jan 03, 2017 at 11:02:09PM +0800, Deucher, Alexander wrote:

> > -----Original Message-----

> > From: Huang Rui [mailto:ray.huang@amd.com]

> > Sent: Tuesday, January 03, 2017 5:47 AM

> > To: Deucher, Alexander; amd-gfx@lists.freedesktop.org<mailto:amd-gfx@lists.freedesktop.org>

> > Cc: Zhu, Rex; Mao, David; Fu, Ping; Huang, Ray

> > Subject: [PATCH] drm/amdgpu: show gfx clock gating status to user

> >

> > Signed-off-by: Huang Rui <ray.huang@amd.com<mailto:ray.huang@amd.com>>

> > ---

> >  drivers/gpu/drm/amd/amdgpu/amdgpu.h    | 1 +

> >  drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 5 +++++

> > drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c  | 2 ++

> > drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c  | 2 ++

> > drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c  | 3 +++

> >  5 files changed, 13 insertions(+)

> >

> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h

> > b/drivers/gpu/drm/amd/amdgpu/amdgpu.h

> > index 96eeea7..989d311 100644

> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h

> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h

> > @@ -1033,6 +1033,7 @@ struct amdgpu_gfx {

> >          struct amdgpu_irq_src              priv_inst_irq;

> >          /* gfx status */

> >          uint32_t                     gfx_current_status;

> > +          bool                             cg_enabled;

> >          /* ce ram size*/

> >          unsigned                     ce_ram_size;

> >          struct amdgpu_cu_info             cu_info;

> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c

> > b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c

> > index a7c7657..10f2eab 100644

> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c

> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c

> > @@ -1543,6 +1543,11 @@ static int amdgpu_debugfs_pm_info(struct

> > seq_file *m, void *data)

> >          struct amdgpu_device *adev = dev->dev_private;

> >          struct drm_device *ddev = adev->ddev;

> >

> > +          if (adev->gfx.cg_enabled)

> > +                   seq_printf(m, "GFX Clock Gating: Enabled\n");

> > +          else

> > +                   seq_printf(m, "GFX Clock Gating: Disabled\n");

> > +

>

>

> I think it would be better to print the cg_flags and pg_flags (both as a mask and in human readable form) so we know exactly cg and pg features are enabled.

>



It's probable better. Let me revise this patch and send it later.



Thanks,

Rui