[03/14] Backend: Refine register offset for simd shuffle

Submitted by Pan Xiuli on Oct. 12, 2016, 8:56 a.m.

Details

Message ID 1476262604-27504-3-git-send-email-xiuli.pan@intel.com
State New
Headers show
Series "Series without cover letter" ( rev: 1 ) in Beignet

Not browsing as part of any series.

Commit Message

Pan Xiuli Oct. 12, 2016, 8:56 a.m.
From: Pan Xiuli <xiuli.pan@intel.com>

Simd shuffle should support different type, we used to support float or
dword type. Now we can set offset by src type.

Signed-off-by: Pan Xiuli <xiuli.pan@intel.com>
---
 backend/src/backend/gen_context.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Patch hide | download patch | download mbox

diff --git a/backend/src/backend/gen_context.cpp b/backend/src/backend/gen_context.cpp
index 4f73237..e907931 100644
--- a/backend/src/backend/gen_context.cpp
+++ b/backend/src/backend/gen_context.cpp
@@ -719,7 +719,7 @@  namespace gbe
 
         p->curr.quarterControl = 1;
         p->ADD(a0, GenRegister::unpacked_uw(src1.nr+1, src1.subnr / typeSize(GEN_TYPE_UW)), baseReg);
-        p->MOV(GenRegister::offset(dst, 1, 0), indirect);
+        p->MOV(GenRegister::offset(dst, 0, 8 * typeSize(src0.type)), indirect);
       } else
         NOT_IMPLEMENTED;
     p->pop();