[3/5] drm/amdgpu: fix a bunch of coding style issues in amdgpu_gem.c

Submitted by Christian König on Sept. 15, 2016, 1:10 p.m.

Details

Message ID 1473945024-8275-3-git-send-email-deathsimple@vodafone.de
State New
Headers show
Series "Series without cover letter" ( rev: 1 ) in AMD X.Org drivers

Commit Message

Christian König Sept. 15, 2016, 1:10 p.m.
From: Christian König <christian.koenig@amd.com>

No intented functional change.

Signed-off-by: Christian König <christian.koenig@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 18 ++++++++++++------
 1 file changed, 12 insertions(+), 6 deletions(-)

Patch hide | download patch | download mbox

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
index 88fbed2..70e294b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
@@ -58,7 +58,8 @@  int amdgpu_gem_object_create(struct amdgpu_device *adev, unsigned long size,
 		alignment = PAGE_SIZE;
 	}
 
-	if (!(initial_domain & (AMDGPU_GEM_DOMAIN_GDS | AMDGPU_GEM_DOMAIN_GWS | AMDGPU_GEM_DOMAIN_OA))) {
+	if (!(initial_domain & (AMDGPU_GEM_DOMAIN_GDS | AMDGPU_GEM_DOMAIN_GWS |
+				AMDGPU_GEM_DOMAIN_OA))) {
 		/* Maximum bo size is the unpinned gtt size since we use the gtt to
 		 * handle vram to system pool migrations.
 		 */
@@ -116,7 +117,8 @@  void amdgpu_gem_force_release(struct amdgpu_device *adev)
  * Call from drm_gem_handle_create which appear in both new and open ioctl
  * case.
  */
-int amdgpu_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_priv)
+int amdgpu_gem_object_open(struct drm_gem_object *obj,
+			   struct drm_file *file_priv)
 {
 	struct amdgpu_bo *rbo = gem_to_amdgpu_bo(obj);
 	struct amdgpu_device *adev = rbo->adev;
@@ -408,9 +410,11 @@  int amdgpu_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
 	}
 	robj = gem_to_amdgpu_bo(gobj);
 	if (timeout == 0)
-		ret = reservation_object_test_signaled_rcu(robj->tbo.resv, true);
+		ret = reservation_object_test_signaled_rcu(robj->tbo.resv,
+							   true);
 	else
-		ret = reservation_object_wait_timeout_rcu(robj->tbo.resv, true, true, timeout);
+		ret = reservation_object_wait_timeout_rcu(robj->tbo.resv, true,
+							  true, timeout);
 
 	/* ret == 0 means not signaled,
 	 * ret > 0 means signaled
@@ -480,7 +484,8 @@  out:
  * vital here, so they are not reported back to userspace.
  */
 static void amdgpu_gem_va_update_vm(struct amdgpu_device *adev,
-				    struct amdgpu_bo_va *bo_va, uint32_t operation)
+				    struct amdgpu_bo_va *bo_va,
+				    uint32_t operation)
 {
 	struct ttm_validate_buffer tv, *entry;
 	struct amdgpu_bo_list_entry vm_pd;
@@ -704,7 +709,8 @@  int amdgpu_mode_dumb_create(struct drm_file *file_priv,
 	uint32_t handle;
 	int r;
 
-	args->pitch = amdgpu_align_pitch(adev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);
+	args->pitch = amdgpu_align_pitch(adev, args->width, args->bpp, 0) *
+		((args->bpp + 1) / 8);
 	args->size = (u64)args->pitch * args->height;
 	args->size = ALIGN(args->size, PAGE_SIZE);
 

Comments

On Thu, Sep 15, 2016 at 9:10 AM, Christian König
<deathsimple@vodafone.de> wrote:
> From: Christian König <christian.koenig@amd.com>
>
> No intented functional change.
>

"intended"

In general, with respect to the white space changes, I think the code
is more readable as is, but I don't have a strong opinion either way,
if you prefer this.

> Signed-off-by: Christian König <christian.koenig@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 18 ++++++++++++------
>  1 file changed, 12 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> index 88fbed2..70e294b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> @@ -58,7 +58,8 @@ int amdgpu_gem_object_create(struct amdgpu_device *adev, unsigned long size,
>                 alignment = PAGE_SIZE;
>         }
>
> -       if (!(initial_domain & (AMDGPU_GEM_DOMAIN_GDS | AMDGPU_GEM_DOMAIN_GWS | AMDGPU_GEM_DOMAIN_OA))) {
> +       if (!(initial_domain & (AMDGPU_GEM_DOMAIN_GDS | AMDGPU_GEM_DOMAIN_GWS |
> +                               AMDGPU_GEM_DOMAIN_OA))) {
>                 /* Maximum bo size is the unpinned gtt size since we use the gtt to
>                  * handle vram to system pool migrations.
>                  */
> @@ -116,7 +117,8 @@ void amdgpu_gem_force_release(struct amdgpu_device *adev)
>   * Call from drm_gem_handle_create which appear in both new and open ioctl
>   * case.
>   */
> -int amdgpu_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_priv)
> +int amdgpu_gem_object_open(struct drm_gem_object *obj,
> +                          struct drm_file *file_priv)
>  {
>         struct amdgpu_bo *rbo = gem_to_amdgpu_bo(obj);
>         struct amdgpu_device *adev = rbo->adev;
> @@ -408,9 +410,11 @@ int amdgpu_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
>         }
>         robj = gem_to_amdgpu_bo(gobj);
>         if (timeout == 0)
> -               ret = reservation_object_test_signaled_rcu(robj->tbo.resv, true);
> +               ret = reservation_object_test_signaled_rcu(robj->tbo.resv,
> +                                                          true);
>         else
> -               ret = reservation_object_wait_timeout_rcu(robj->tbo.resv, true, true, timeout);
> +               ret = reservation_object_wait_timeout_rcu(robj->tbo.resv, true,
> +                                                         true, timeout);
>
>         /* ret == 0 means not signaled,
>          * ret > 0 means signaled
> @@ -480,7 +484,8 @@ out:
>   * vital here, so they are not reported back to userspace.
>   */
>  static void amdgpu_gem_va_update_vm(struct amdgpu_device *adev,
> -                                   struct amdgpu_bo_va *bo_va, uint32_t operation)
> +                                   struct amdgpu_bo_va *bo_va,
> +                                   uint32_t operation)
>  {
>         struct ttm_validate_buffer tv, *entry;
>         struct amdgpu_bo_list_entry vm_pd;
> @@ -704,7 +709,8 @@ int amdgpu_mode_dumb_create(struct drm_file *file_priv,
>         uint32_t handle;
>         int r;
>
> -       args->pitch = amdgpu_align_pitch(adev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);
> +       args->pitch = amdgpu_align_pitch(adev, args->width, args->bpp, 0) *
> +               ((args->bpp + 1) / 8);
>         args->size = (u64)args->pitch * args->height;
>         args->size = ALIGN(args->size, PAGE_SIZE);
>
> --
> 2.5.0
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx