From patchwork Fri Jun 27 10:21:44 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [1/3] drm/i915/hdmi: Always force Bitbanging From: Ankit Nautiyal X-Patchwork-Id: 661186 Message-Id: <20250627102146.2599952-2-ankit.k.nautiyal@intel.com> To: intel-gfx-trybot@lists.freedesktop.org Cc: Ankit Nautiyal Date: Fri, 27 Jun 2025 15:51:44 +0530 Always go for Bit-banging while setting up HDMI. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_hdmi.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c index 9961ff259298..2e415fa78c38 100644 --- a/drivers/gpu/drm/i915/display/intel_hdmi.c +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c @@ -2492,6 +2492,7 @@ intel_hdmi_dp_dual_mode_detect(struct drm_connector *_connector) static bool intel_hdmi_set_edid(struct drm_connector *_connector) { +#define FORCE_BITBANGING 1 struct intel_connector *connector = to_intel_connector(_connector); struct intel_display *display = to_intel_display(connector); struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector); @@ -2504,7 +2505,7 @@ intel_hdmi_set_edid(struct drm_connector *_connector) drm_edid = drm_edid_read_ddc(&connector->base, ddc); - if (!drm_edid && !intel_gmbus_is_forced_bit(ddc)) { + if (FORCE_BITBANGING || (!drm_edid && !intel_gmbus_is_forced_bit(ddc))) { drm_dbg_kms(display->drm, "HDMI GMBUS EDID read failed, retry using GPIO bit-banging\n"); intel_gmbus_force_bit(ddc, true); From patchwork Fri Jun 27 10:21:45 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [2/3] drm/i915/display_wa: Add helpers to check wa From: Ankit Nautiyal X-Patchwork-Id: 661185 Message-Id: <20250627102146.2599952-3-ankit.k.nautiyal@intel.com> To: intel-gfx-trybot@lists.freedesktop.org Cc: Ankit Nautiyal Date: Fri, 27 Jun 2025 15:51:45 +0530 Signed-off-by: Ankit Nautiyal --- .../gpu/drm/i915/display/intel_display_wa.h | 21 +++++++++++++++++++ drivers/gpu/drm/i915/display/intel_fbc.c | 2 +- 2 files changed, 22 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.h b/drivers/gpu/drm/i915/display/intel_display_wa.h index babd9d16603d..017d5db36986 100644 --- a/drivers/gpu/drm/i915/display/intel_display_wa.h +++ b/drivers/gpu/drm/i915/display/intel_display_wa.h @@ -7,6 +7,7 @@ #define __INTEL_DISPLAY_WA_H__ #include +#include struct intel_display; @@ -21,4 +22,24 @@ static inline bool intel_display_needs_wa_16023588340(struct intel_display *disp bool intel_display_needs_wa_16023588340(struct intel_display *display); #endif +enum intel_display_wa { + INTEL_DISPLAY_WA_16023588340, +}; + +static inline bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa) +{ + switch (wa) { + case INTEL_DISPLAY_WA_16023588340: + return intel_display_needs_wa_16023588340(display); + default: + MISSING_CASE(wa); + break; + } + + return false; +} + + +#define _intel_display_wa_expand(__wa) INTEL_DISPLAY_WA_##__wa +#define intel_display_wa(__display, __wa) __intel_display_wa((__display), _intel_display_wa_expand(__wa)) #endif diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c index ec1ef8694c35..f4b7ff549fd4 100644 --- a/drivers/gpu/drm/i915/display/intel_fbc.c +++ b/drivers/gpu/drm/i915/display/intel_fbc.c @@ -1464,7 +1464,7 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state, return 0; } - if (intel_display_needs_wa_16023588340(display)) { + if (intel_display_wa(display, 16023588340)) { plane_state->no_fbc_reason = "Wa_16023588340"; return 0; } From patchwork Fri Jun 27 10:21:46 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [3/3] drm/i915/gmbus: Add Wa_16025573575 for PTL for bit-bashing From: Ankit Nautiyal X-Patchwork-Id: 661187 Message-Id: <20250627102146.2599952-4-ankit.k.nautiyal@intel.com> To: intel-gfx-trybot@lists.freedesktop.org Cc: Ankit Nautiyal Date: Fri, 27 Jun 2025 15:51:46 +0530 As per Wa_16025573575 for PTL, set the GPIO masks bit before starting bit-bashing and maintain value through the bit-bashing sequence. After bit-bashing sequence is done, clear the GPIO masks bits. v2: -Use new helper for display workarounds. (Jani) -Use a separate if-block for the workaround. (Gustavo) Signed-off-by: Ankit Nautiyal --- .../gpu/drm/i915/display/intel_display_wa.h | 10 ++++++ drivers/gpu/drm/i915/display/intel_gmbus.c | 34 +++++++++++++++++-- drivers/gpu/drm/xe/display/xe_display_wa.c | 7 ++++ drivers/gpu/drm/xe/xe_wa_oob.rules | 1 + 4 files changed, 50 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.h b/drivers/gpu/drm/i915/display/intel_display_wa.h index 017d5db36986..0db750133387 100644 --- a/drivers/gpu/drm/i915/display/intel_display_wa.h +++ b/drivers/gpu/drm/i915/display/intel_display_wa.h @@ -18,12 +18,20 @@ static inline bool intel_display_needs_wa_16023588340(struct intel_display *disp { return false; } + +static inline bool intel_display_needs_wa_16025573575(struct intel_display *display) +{ + return false; +} + #else bool intel_display_needs_wa_16023588340(struct intel_display *display); +bool intel_display_needs_wa_16025573575(struct intel_display *display); #endif enum intel_display_wa { INTEL_DISPLAY_WA_16023588340, + INTEL_DISPLAY_WA_16025573575, }; static inline bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa) @@ -31,6 +39,8 @@ static inline bool __intel_display_wa(struct intel_display *display, enum intel_ switch (wa) { case INTEL_DISPLAY_WA_16023588340: return intel_display_needs_wa_16023588340(display); + case INTEL_DISPLAY_WA_16025573575: + return intel_display_needs_wa_16025573575(display); default: MISSING_CASE(wa); break; diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c b/drivers/gpu/drm/i915/display/intel_gmbus.c index 0d73f32fe7f1..95cab11c9cde 100644 --- a/drivers/gpu/drm/i915/display/intel_gmbus.c +++ b/drivers/gpu/drm/i915/display/intel_gmbus.c @@ -39,6 +39,7 @@ #include "intel_de.h" #include "intel_display_regs.h" #include "intel_display_types.h" +#include "intel_display_wa.h" #include "intel_gmbus.h" #include "intel_gmbus_regs.h" @@ -241,11 +242,18 @@ static u32 get_reserved(struct intel_gmbus *bus) { struct intel_display *display = bus->display; u32 reserved = 0; + u32 preserve_bits = 0; /* On most chips, these bits must be preserved in software. */ if (!display->platform.i830 && !display->platform.i845g) - reserved = intel_de_read_notrace(display, bus->gpio_reg) & - (GPIO_DATA_PULLUP_DISABLE | GPIO_CLOCK_PULLUP_DISABLE); + preserve_bits |= GPIO_DATA_PULLUP_DISABLE | GPIO_CLOCK_PULLUP_DISABLE; + + /* PTL: Wa_16025573575: the masks bits need to be preserved through out */ + if (intel_display_wa(display, 16025573575)) + preserve_bits |= GPIO_CLOCK_DIR_MASK | GPIO_CLOCK_VAL_MASK | + GPIO_DATA_DIR_MASK | GPIO_DATA_VAL_MASK; + + reserved = intel_de_read_notrace(display, bus->gpio_reg) & preserve_bits; return reserved; } @@ -308,6 +316,22 @@ static void set_data(void *data, int state_high) intel_de_posting_read(display, bus->gpio_reg); } +static void +ptl_handle_mask_bits(struct intel_gmbus *bus, bool set) +{ + struct intel_display *display = bus->display; + u32 reg_val = intel_de_read_notrace(display, bus->gpio_reg); + u32 mask_bits = GPIO_CLOCK_DIR_MASK | GPIO_CLOCK_VAL_MASK | + GPIO_DATA_DIR_MASK | GPIO_DATA_VAL_MASK; + if (set) + reg_val |= mask_bits; + else + reg_val &= ~mask_bits; + + intel_de_write_notrace(display, bus->gpio_reg, reg_val); + intel_de_posting_read(display, bus->gpio_reg); +} + static int intel_gpio_pre_xfer(struct i2c_adapter *adapter) { @@ -319,6 +343,9 @@ intel_gpio_pre_xfer(struct i2c_adapter *adapter) if (display->platform.pineview) pnv_gmbus_clock_gating(display, false); + if (intel_display_wa(display, 16025573575)) + ptl_handle_mask_bits(bus, true); + set_data(bus, 1); set_clock(bus, 1); udelay(I2C_RISEFALL_TIME); @@ -336,6 +363,9 @@ intel_gpio_post_xfer(struct i2c_adapter *adapter) if (display->platform.pineview) pnv_gmbus_clock_gating(display, true); + + if (intel_display_wa(display, 16025573575)) + ptl_handle_mask_bits(bus, false); } static void diff --git a/drivers/gpu/drm/xe/display/xe_display_wa.c b/drivers/gpu/drm/xe/display/xe_display_wa.c index 68d1387d81a0..1e2ee62cb89a 100644 --- a/drivers/gpu/drm/xe/display/xe_display_wa.c +++ b/drivers/gpu/drm/xe/display/xe_display_wa.c @@ -16,3 +16,10 @@ bool intel_display_needs_wa_16023588340(struct intel_display *display) return XE_WA(xe_root_mmio_gt(xe), 16023588340); } + +bool intel_display_needs_wa_16025573575(struct intel_display *display) +{ + struct xe_device *xe = to_xe_device(display->drm); + + return XE_WA(xe_root_mmio_gt(xe), 16025573575); +} diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules index 425cb401c276..05053dff611e 100644 --- a/drivers/gpu/drm/xe/xe_wa_oob.rules +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules @@ -59,3 +59,4 @@ no_media_l3 MEDIA_VERSION(3000) MEDIA_VERSION_RANGE(1301, 3000) 16026508708 GRAPHICS_VERSION_RANGE(1200, 3001) MEDIA_VERSION_RANGE(1300, 3000) +16025573575 GRAPHICS_VERSION(3000)