From patchwork Mon Aug 21 09:19:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: drm/xe: Add a couple of pcode helpers From: Sujaritha Sundaresan X-Patchwork-Id: 553597 Message-Id: <20230821091926.3832001-1-sujaritha.sundaresan@intel.com> To: intel-gfx-trybot@lists.freedesktop.org Cc: Sujaritha Sundaresan Date: Mon, 21 Aug 2023 14:49:26 +0530 Some pcode commands take additional sub-commands and parameters. Add a couple of helpers to help formatting these commands to improve code readability. Signed-off-by: Sujaritha Sundaresan --- drivers/gpu/drm/xe/xe_pcode.c | 28 ++++++++++++++++++++++++++++ drivers/gpu/drm/xe/xe_pcode.h | 3 +++ 2 files changed, 31 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_pcode.c b/drivers/gpu/drm/xe/xe_pcode.c index 7f1bf2297f51..e45169f47500 100644 --- a/drivers/gpu/drm/xe/xe_pcode.c +++ b/drivers/gpu/drm/xe/xe_pcode.c @@ -104,6 +104,34 @@ int xe_pcode_read(struct xe_gt *gt, u32 mbox, u32 *val, u32 *val1) return err; } +int xe_pcode_read_p(struct xe_gt *gt, u32 mbcmd, u32 p1, u32 p2, u32 *val) +{ + u32 mbox; + int err; + + mbox = REG_FIELD_PREP(PCODE_MB_COMMAND, mbcmd) + | REG_FIELD_PREP(PCODE_MB_PARAM1, p1) + | REG_FIELD_PREP(PCODE_MB_PARAM2, p2); + + err = xe_pcode_read(gt, mbox, val, NULL); + + return err; +} + +int xe_pcode_write_p(struct xe_gt *gt, u32 mbcmd, u32 p1, u32 p2, u32 val) +{ + u32 mbox; + int err; + + mbox = REG_FIELD_PREP(PCODE_MB_COMMAND, mbcmd) + | REG_FIELD_PREP(PCODE_MB_PARAM1, p1) + | REG_FIELD_PREP(PCODE_MB_PARAM2, p2); + + err = xe_pcode_write(gt, mbox, val); + + return err; +} + static int xe_pcode_try_request(struct xe_gt *gt, u32 mbox, u32 request, u32 reply_mask, u32 reply, u32 *status, bool atomic, int timeout_us) diff --git a/drivers/gpu/drm/xe/xe_pcode.h b/drivers/gpu/drm/xe/xe_pcode.h index 3b4aa8c1a3ba..8d4103afd7e0 100644 --- a/drivers/gpu/drm/xe/xe_pcode.h +++ b/drivers/gpu/drm/xe/xe_pcode.h @@ -19,6 +19,9 @@ int xe_pcode_write_timeout(struct xe_gt *gt, u32 mbox, u32 val, #define xe_pcode_write(gt, mbox, val) \ xe_pcode_write_timeout(gt, mbox, val, 1) +int xe_pcode_read_p(struct xe_gt *gt, u32 mbcmd, u32 p1, u32 p2, u32 *val); +int xe_pcode_write_p(struct xe_gt *gt, u32 mbcmd, u32 p1, u32 p2, u32 val); + int xe_pcode_request(struct xe_gt *gt, u32 mbox, u32 request, u32 reply_mask, u32 reply, int timeout_ms);