From patchwork Wed Aug 9 08:45:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: Add multi-gt support for rc6 residency tests From: Sujaritha Sundaresan X-Patchwork-Id: 551927 Message-Id: <20230809084503.28238-1-sujaritha.sundaresan@intel.com> To: intel-gfx-trybot@lists.freedesktop.org Cc: Sujaritha Sundaresan Date: Wed, 9 Aug 2023 01:45:03 -0700 Signed-off-by: Sujaritha Sundaresan --- tests/i915/i915_pm_rc6_residency.c | 26 +++++++++++++++++--------- 1 file changed, 17 insertions(+), 9 deletions(-) diff --git a/tests/i915/i915_pm_rc6_residency.c b/tests/i915/i915_pm_rc6_residency.c index b266680ac..fef7a1a93 100644 --- a/tests/i915/i915_pm_rc6_residency.c +++ b/tests/i915/i915_pm_rc6_residency.c @@ -376,7 +376,7 @@ static void kill_children(int sig) signal(sig, old); } -static void rc6_idle(int i915, uint32_t ctx_id, uint64_t flags) +static void rc6_idle(int i915, uint32_t ctx_id, uint64_t flags, unsigned int gt) { const int64_t duration_ns = SLEEP_DURATION * (int64_t)NSEC_PER_SEC; const int tolerance = 20; /* Some RC6 is better than none! */ @@ -397,7 +397,7 @@ static void rc6_idle(int i915, uint32_t ctx_id, uint64_t flags) struct igt_power gpu; int fd; - fd = open_pmu(i915, I915_PMU_RC6_RESIDENCY); + fd = open_pmu(i915, __I915_PMU_RC6_RESIDENCY(gt)); igt_drop_caches_set(i915, DROP_IDLE); igt_require(__pmu_wait_for_rc6(fd)); igt_power_open(i915, &gpu, "gpu"); @@ -471,7 +471,7 @@ static void rc6_idle(int i915, uint32_t ctx_id, uint64_t flags) } } -static void rc6_fence(int i915, const intel_ctx_t *ctx) +static void rc6_fence(int i915, const intel_ctx_t *ctx, unsigned int gt) { const int64_t duration_ns = SLEEP_DURATION * (int64_t)NSEC_PER_SEC; const int tolerance = 20; /* Some RC6 is better than none! */ @@ -485,7 +485,7 @@ static void rc6_fence(int i915, const intel_ctx_t *ctx) igt_require_sw_sync(); - fd = open_pmu(i915, I915_PMU_RC6_RESIDENCY); + fd = open_pmu(i915, __I915_PMU_RC6_RESIDENCY(gt)); igt_drop_caches_set(i915, DROP_IDLE); igt_require(__pmu_wait_for_rc6(fd)); igt_power_open(i915, &gpu, "gpu"); @@ -509,6 +509,7 @@ static void rc6_fence(int i915, const intel_ctx_t *ctx) assert_within_epsilon(rc6, ts[1] - ts[0], 5); /* Submit but delay execution, we should be idle and conserving power */ + ctx = intel_ctx_create_for_gt(i915, gt); ahnd = get_reloc_ahnd(i915, ctx->id); for_each_ctx_engine(i915, ctx, e) { igt_spin_t *spin; @@ -550,6 +551,7 @@ static void rc6_fence(int i915, const intel_ctx_t *ctx) gem_quiescent_gpu(i915); } put_ahnd(ahnd); + intel_ctx_destroy(i915, ctx); igt_power_close(&gpu); close(fd); @@ -572,10 +574,14 @@ igt_main igt_require_gem(i915); gem_quiescent_gpu(i915); - for_each_ctx_engine(i915, ctx, e) { - if (e->instance == 0) { - igt_dynamic_f("%s", e->name) - rc6_idle(i915, ctx->id, e->flags); + for_each_gt(i915, gt, dirfd) { + ctx = intel_ctx_create_for_gt(i915, gt); + for_each_ctx_engine(i915, ctx, e) { + if (e->instance == 0) { + igt_dynamic_f("%s", e->name) + rc6_idle(i915, ctx->id, e->flags); + } + intel_ctx_destroy(i915, ctx); } } } @@ -584,7 +590,9 @@ igt_main igt_require_gem(i915); gem_quiescent_gpu(i915); - rc6_fence(i915, ctx); + for_each_gt(i915, gt, dirfd) + igt_dynamic_f("gt%u", gt) + rc6_fence(i915, ctx); } igt_subtest_group {